27 lines
742 B
C
27 lines
742 B
C
/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
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/*
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* Copyright (c) 2023 Amlogic, Inc. All rights reserved.
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* Author: Chuan Liu <chuan.liu@amlogic.com>
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*/
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#ifndef __AMLOGIC_C3_SCMI_CLKC_H
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#define __AMLOGIC_C3_SCMI_CLKC_H
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#define CLKID_DDR_PLL_OSC 0
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#define CLKID_DDR_PHY 1
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#define CLKID_TOP_PLL_OSC 2
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#define CLKID_USB_PLL_OSC 3
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#define CLKID_MIPIISP_VOUT 4
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#define CLKID_MCLK_PLL_OSC 5
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#define CLKID_USB_CTRL 6
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#define CLKID_ETH_PLL_OSC 7
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#define CLKID_OSC 8
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#define CLKID_SYS_CLK 9
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#define CLKID_AXI_CLK 10
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#define CLKID_CPU_CLK 11
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#define CLKID_FIXED_PLL_OSC 12
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#define CLKID_GP1_PLL_OSC 13
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#define CLKID_SYS_PLL_DIV16 14
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#define CLKID_CPU_CLK_DIV16 15
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#endif /* __AMLOGIC_C3_SCMI_CLKC_H */
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