485 lines
17 KiB
C++
485 lines
17 KiB
C++
/*
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* QEMU float support
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*
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* The code in this source file is derived from release 2a of the SoftFloat
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* IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
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* some later contributions) are provided under that license, as detailed below.
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* It has subsequently been modified by contributors to the QEMU Project,
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* so some portions are provided under:
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* the SoftFloat-2a license
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* the BSD license
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* GPL-v2-or-later
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*
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* Any future contributions to this file after December 1st 2014 will be
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* taken to be licensed under the Softfloat-2a license unless specifically
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* indicated otherwise.
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*/
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/*
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===============================================================================
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This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
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Arithmetic Package, Release 2a.
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Written by John R. Hauser. This work was made possible in part by the
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International Computer Science Institute, located at Suite 600, 1947 Center
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Street, Berkeley, California 94704. Funding was partially provided by the
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National Science Foundation under grant MIP-9311980. The original version
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of this code was written as part of a project to build a fixed-point vector
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processor in collaboration with the University of California at Berkeley,
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overseen by Profs. Nelson Morgan and John Wawrzynek. More information
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is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
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arithmetic/SoftFloat.html'.
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THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
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has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
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TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
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PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
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AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
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Derivative works are acceptable, even for commercial purposes, so long as
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(1) they include prominent notice that the work is derivative, and (2) they
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include prominent notice akin to these four paragraphs for those parts of
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this code that are retained.
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===============================================================================
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*/
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/* BSD licensing:
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* Copyright (c) 2006, Fabrice Bellard
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* Portions of this work are licensed under the terms of the GNU GPL,
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* version 2 or later. See the COPYING file in the top-level directory.
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*/
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/*
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* Define whether architecture deviates from IEEE in not supporting
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* signaling NaNs (so all NaNs are treated as quiet).
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*/
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static inline bool no_signaling_nans(float_status *status)
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{
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return status->no_signaling_nans;
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}
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/* Define how the architecture discriminates signaling NaNs.
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* This done with the most significant bit of the fraction.
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* In IEEE 754-1985 this was implementation defined, but in IEEE 754-2008
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* the msb must be zero. MIPS is (so far) unique in supporting both the
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* 2008 revision and backward compatibility with their original choice.
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*/
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static inline bool snan_bit_is_one(float_status *status)
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{
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return status->snan_bit_is_one;
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}
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/*----------------------------------------------------------------------------
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| For the deconstructed floating-point with fraction FRAC, return true
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| if the fraction represents a signalling NaN; otherwise false.
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*----------------------------------------------------------------------------*/
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static bool parts_is_snan_frac(uint64_t frac, float_status *status)
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{
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if (no_signaling_nans(status)) {
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return false;
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} else {
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bool msb = extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1);
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return msb == snan_bit_is_one(status);
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}
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}
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/*----------------------------------------------------------------------------
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| The pattern for a default generated deconstructed floating-point NaN.
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*----------------------------------------------------------------------------*/
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static void parts64_default_nan(FloatParts64 *p, float_status *status)
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{
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bool sign = 0;
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uint64_t frac;
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uint8_t dnan_pattern = status->default_nan_pattern;
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assert(dnan_pattern != 0);
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sign = dnan_pattern >> 7;
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/*
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* Place default_nan_pattern [6:0] into bits [62:56],
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* and replecate bit [0] down into [55:0]
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*/
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frac = deposit64(0, DECOMPOSED_BINARY_POINT - 7, 7, dnan_pattern);
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frac = deposit64(frac, 0, DECOMPOSED_BINARY_POINT - 7, -(dnan_pattern & 1));
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*p = (FloatParts64) {
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.cls = float_class_qnan,
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.sign = sign,
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.exp = INT_MAX,
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.frac = frac
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};
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}
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static void parts128_default_nan(FloatParts128 *p, float_status *status)
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{
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/*
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* Extrapolate from the choices made by parts64_default_nan to fill
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* in the quad-floating format. If the low bit is set, assume we
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* want to set all non-snan bits.
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*/
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FloatParts64 p64;
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parts64_default_nan(&p64, status);
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*p = (FloatParts128) {
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.cls = float_class_qnan,
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.sign = p64.sign,
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.exp = INT_MAX,
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.frac_hi = p64.frac,
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.frac_lo = -(p64.frac & 1)
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};
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}
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/*----------------------------------------------------------------------------
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| Returns a quiet NaN from a signalling NaN for the deconstructed
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| floating-point parts.
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*----------------------------------------------------------------------------*/
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static uint64_t parts_silence_nan_frac(uint64_t frac, float_status *status)
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{
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g_assert(!no_signaling_nans(status));
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/* The only snan_bit_is_one target without default_nan_mode is HPPA. */
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if (snan_bit_is_one(status)) {
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frac &= ~(1ULL << (DECOMPOSED_BINARY_POINT - 1));
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frac |= 1ULL << (DECOMPOSED_BINARY_POINT - 2);
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} else {
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frac |= 1ULL << (DECOMPOSED_BINARY_POINT - 1);
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}
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return frac;
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}
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static void parts64_silence_nan(FloatParts64 *p, float_status *status)
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{
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p->frac = parts_silence_nan_frac(p->frac, status);
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p->cls = float_class_qnan;
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}
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static void parts128_silence_nan(FloatParts128 *p, float_status *status)
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{
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p->frac_hi = parts_silence_nan_frac(p->frac_hi, status);
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p->cls = float_class_qnan;
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}
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/*----------------------------------------------------------------------------
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| The pattern for a default generated extended double-precision NaN.
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*----------------------------------------------------------------------------*/
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floatx80 floatx80_default_nan(float_status *status)
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{
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floatx80 r;
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/*
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* Extrapolate from the choices made by parts64_default_nan to fill
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* in the floatx80 format. We assume that floatx80's explicit
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* integer bit is always set (this is true for i386 and m68k,
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* which are the only real users of this format).
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*/
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FloatParts64 p64;
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parts64_default_nan(&p64, status);
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r.high = 0x7FFF | (p64.sign << 15);
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r.low = (1ULL << DECOMPOSED_BINARY_POINT) | p64.frac;
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return r;
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}
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/*----------------------------------------------------------------------------
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| The pattern for a default generated extended double-precision inf.
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*----------------------------------------------------------------------------*/
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floatx80 floatx80_default_inf(bool zSign, float_status *status)
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{
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/*
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* Whether the Integer bit is set in the default Infinity is
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* target dependent.
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*/
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bool z = status->floatx80_behaviour & floatx80_default_inf_int_bit_is_zero;
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return packFloatx80(zSign, 0x7fff, z ? 0 : (1ULL << 63));
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}
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/*----------------------------------------------------------------------------
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| Returns 1 if the half-precision floating-point value `a' is a quiet
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| NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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bool float16_is_quiet_nan(float16 a_, float_status *status)
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{
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if (no_signaling_nans(status)) {
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return float16_is_any_nan(a_);
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} else {
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uint16_t a = float16_val(a_);
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if (snan_bit_is_one(status)) {
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return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
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} else {
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return ((a >> 9) & 0x3F) == 0x3F;
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}
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}
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}
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/*----------------------------------------------------------------------------
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| Returns 1 if the bfloat16 value `a' is a quiet
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| NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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bool bfloat16_is_quiet_nan(bfloat16 a_, float_status *status)
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{
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if (no_signaling_nans(status)) {
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return bfloat16_is_any_nan(a_);
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} else {
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uint16_t a = a_;
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if (snan_bit_is_one(status)) {
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return (((a >> 6) & 0x1FF) == 0x1FE) && (a & 0x3F);
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} else {
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return ((a >> 6) & 0x1FF) == 0x1FF;
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}
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}
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}
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/*----------------------------------------------------------------------------
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| Returns 1 if the half-precision floating-point value `a' is a signaling
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| NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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bool float16_is_signaling_nan(float16 a_, float_status *status)
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{
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if (no_signaling_nans(status)) {
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return 0;
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} else {
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uint16_t a = float16_val(a_);
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if (snan_bit_is_one(status)) {
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return ((a >> 9) & 0x3F) == 0x3F;
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} else {
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return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
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}
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}
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}
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/*----------------------------------------------------------------------------
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| Returns 1 if the bfloat16 value `a' is a signaling
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| NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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bool bfloat16_is_signaling_nan(bfloat16 a_, float_status *status)
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{
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if (no_signaling_nans(status)) {
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return 0;
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} else {
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uint16_t a = a_;
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if (snan_bit_is_one(status)) {
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return ((a >> 6) & 0x1FF) == 0x1FF;
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} else {
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return (((a >> 6) & 0x1FF) == 0x1FE) && (a & 0x3F);
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}
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}
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}
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/*----------------------------------------------------------------------------
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| Returns 1 if the single-precision floating-point value `a' is a quiet
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| NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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bool float32_is_quiet_nan(float32 a_, float_status *status)
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{
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if (no_signaling_nans(status)) {
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return float32_is_any_nan(a_);
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} else {
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uint32_t a = float32_val(a_);
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if (snan_bit_is_one(status)) {
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return (((a >> 22) & 0x1FF) == 0x1FE) && (a & 0x003FFFFF);
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} else {
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return ((uint32_t)(a << 1) >= 0xFF800000);
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}
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}
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}
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/*----------------------------------------------------------------------------
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| Returns 1 if the single-precision floating-point value `a' is a signaling
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| NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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bool float32_is_signaling_nan(float32 a_, float_status *status)
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{
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if (no_signaling_nans(status)) {
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return 0;
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} else {
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uint32_t a = float32_val(a_);
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if (snan_bit_is_one(status)) {
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return ((uint32_t)(a << 1) >= 0xFF800000);
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} else {
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return (((a >> 22) & 0x1FF) == 0x1FE) && (a & 0x003FFFFF);
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}
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}
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}
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/*----------------------------------------------------------------------------
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| Returns 1 if the double-precision floating-point value `a' is a quiet
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| NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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bool float64_is_quiet_nan(float64 a_, float_status *status)
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{
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if (no_signaling_nans(status)) {
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return float64_is_any_nan(a_);
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} else {
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uint64_t a = float64_val(a_);
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if (snan_bit_is_one(status)) {
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return (((a >> 51) & 0xFFF) == 0xFFE)
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&& (a & 0x0007FFFFFFFFFFFFULL);
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} else {
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return ((a << 1) >= 0xFFF0000000000000ULL);
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}
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}
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}
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/*----------------------------------------------------------------------------
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| Returns 1 if the double-precision floating-point value `a' is a signaling
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| NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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bool float64_is_signaling_nan(float64 a_, float_status *status)
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{
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if (no_signaling_nans(status)) {
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return 0;
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} else {
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uint64_t a = float64_val(a_);
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if (snan_bit_is_one(status)) {
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return ((a << 1) >= 0xFFF0000000000000ULL);
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} else {
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return (((a >> 51) & 0xFFF) == 0xFFE)
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&& (a & UINT64_C(0x0007FFFFFFFFFFFF));
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}
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}
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}
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/*----------------------------------------------------------------------------
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| Returns 1 if the extended double-precision floating-point value `a' is a
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| quiet NaN; otherwise returns 0. This slightly differs from the same
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| function for other types as floatx80 has an explicit bit.
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*----------------------------------------------------------------------------*/
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int floatx80_is_quiet_nan(floatx80 a, float_status *status)
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{
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if (no_signaling_nans(status)) {
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return floatx80_is_any_nan(a);
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} else {
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if (snan_bit_is_one(status)) {
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uint64_t aLow;
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aLow = a.low & ~0x4000000000000000ULL;
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return ((a.high & 0x7FFF) == 0x7FFF)
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&& (aLow << 1)
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&& (a.low == aLow);
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} else {
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return ((a.high & 0x7FFF) == 0x7FFF)
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&& (UINT64_C(0x8000000000000000) <= ((uint64_t)(a.low << 1)));
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}
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}
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}
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/*----------------------------------------------------------------------------
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| Returns 1 if the extended double-precision floating-point value `a' is a
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| signaling NaN; otherwise returns 0. This slightly differs from the same
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| function for other types as floatx80 has an explicit bit.
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*----------------------------------------------------------------------------*/
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int floatx80_is_signaling_nan(floatx80 a, float_status *status)
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{
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if (no_signaling_nans(status)) {
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return 0;
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} else {
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if (snan_bit_is_one(status)) {
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return ((a.high & 0x7FFF) == 0x7FFF)
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&& ((a.low << 1) >= 0x8000000000000000ULL);
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} else {
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uint64_t aLow;
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aLow = a.low & ~UINT64_C(0x4000000000000000);
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return ((a.high & 0x7FFF) == 0x7FFF)
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&& (uint64_t)(aLow << 1)
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&& (a.low == aLow);
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}
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}
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}
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/*----------------------------------------------------------------------------
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| Returns a quiet NaN from a signalling NaN for the extended double-precision
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| floating point value `a'.
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*----------------------------------------------------------------------------*/
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floatx80 floatx80_silence_nan(floatx80 a, float_status *status)
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{
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/* None of the targets that have snan_bit_is_one use floatx80. */
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assert(!snan_bit_is_one(status));
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a.low |= UINT64_C(0xC000000000000000);
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return a;
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}
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/*----------------------------------------------------------------------------
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| Returns 1 if the quadruple-precision floating-point value `a' is a quiet
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| NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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bool float128_is_quiet_nan(float128 a, float_status *status)
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{
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if (no_signaling_nans(status)) {
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return float128_is_any_nan(a);
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} else {
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if (snan_bit_is_one(status)) {
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return (((a.high >> 47) & 0xFFFF) == 0xFFFE)
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&& (a.low || (a.high & 0x00007FFFFFFFFFFFULL));
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} else {
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return ((a.high << 1) >= 0xFFFF000000000000ULL)
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&& (a.low || (a.high & 0x0000FFFFFFFFFFFFULL));
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}
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}
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}
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/*----------------------------------------------------------------------------
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| Returns 1 if the quadruple-precision floating-point value `a' is a
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| signaling NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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bool float128_is_signaling_nan(float128 a, float_status *status)
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{
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if (no_signaling_nans(status)) {
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return 0;
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} else {
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if (snan_bit_is_one(status)) {
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return ((a.high << 1) >= 0xFFFF000000000000ULL)
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&& (a.low || (a.high & 0x0000FFFFFFFFFFFFULL));
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} else {
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return (((a.high >> 47) & 0xFFFF) == 0xFFFE)
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&& (a.low || (a.high & UINT64_C(0x00007FFFFFFFFFFF)));
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}
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}
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}
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