206 lines
5.3 KiB
C
206 lines
5.3 KiB
C
// SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
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/* Copyright 2013-2019 IBM Corp. */
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#include <skiboot.h>
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#include <chip.h>
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#include <console.h>
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#include <device.h>
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#include <timebase.h>
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#include <cpu.h>
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static struct proc_chip *chips[MAX_CHIPS];
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enum proc_chip_quirks proc_chip_quirks;
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uint32_t pir_to_chip_id(uint32_t pir)
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{
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if (proc_gen == proc_gen_p10 || proc_gen == proc_gen_p11)
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return P10_PIR2GCID(pir);
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else if (proc_gen == proc_gen_p9)
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return P9_PIR2GCID(pir);
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else if (proc_gen == proc_gen_p8)
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return P8_PIR2GCID(pir);
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else
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assert(false);
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}
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uint32_t pir_to_core_id(uint32_t pir)
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{
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if (proc_gen == proc_gen_p10 || proc_gen == proc_gen_p11) {
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if (this_cpu()->is_fused_core)
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return P10_PIRFUSED2NORMALCOREID(pir);
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else
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return P10_PIR2COREID(pir);
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} else if (proc_gen == proc_gen_p9) {
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if (this_cpu()->is_fused_core)
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return P9_PIRFUSED2NORMALCOREID(pir);
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else
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return P9_PIR2COREID(pir);
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} else if (proc_gen == proc_gen_p8) {
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return P8_PIR2COREID(pir);
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} else {
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assert(false);
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}
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}
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uint32_t pir_to_fused_core_id(uint32_t pir)
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{
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if (proc_gen == proc_gen_p10 || proc_gen == proc_gen_p11) {
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if (this_cpu()->is_fused_core)
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return P10_PIR2FUSEDCOREID(pir);
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else
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return P10_PIR2COREID(pir);
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} else if (proc_gen == proc_gen_p9) {
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if (this_cpu()->is_fused_core)
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return P9_PIR2FUSEDCOREID(pir);
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else
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return P9_PIR2COREID(pir);
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} else if (proc_gen == proc_gen_p8) {
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return P8_PIR2COREID(pir);
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} else {
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assert(false);
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}
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}
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uint32_t pir_to_thread_id(uint32_t pir)
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{
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if (proc_gen == proc_gen_p10 || proc_gen == proc_gen_p11) {
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if (this_cpu()->is_fused_core)
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return P10_PIRFUSED2NORMALTHREADID(pir);
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else
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return P10_PIR2THREADID(pir);
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} else if (proc_gen == proc_gen_p9) {
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if (this_cpu()->is_fused_core)
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return P9_PIRFUSED2NORMALTHREADID(pir);
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else
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return P9_PIR2THREADID(pir);
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} else if (proc_gen == proc_gen_p8) {
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return P8_PIR2THREADID(pir);
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} else {
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assert(false);
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}
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}
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struct proc_chip *next_chip(struct proc_chip *chip)
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{
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unsigned int i;
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for (i = chip ? (chip->id + 1) : 0; i < MAX_CHIPS; i++)
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if (chips[i])
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return chips[i];
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return NULL;
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}
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struct proc_chip *get_chip(uint32_t chip_id)
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{
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if (chip_id >= MAX_CHIPS)
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return NULL;
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return chips[chip_id];
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}
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static void init_chip(struct dt_node *dn)
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{
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struct proc_chip *chip;
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uint32_t id;
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const char *lc = NULL;
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id = dt_get_chip_id(dn);
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assert(id < MAX_CHIPS);
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assert(chips[id] == NULL);
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chip = zalloc(sizeof(struct proc_chip));
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assert(chip);
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chip->id = id;
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chip->devnode = dn;
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chip->dbob_id = dt_prop_get_u32_def(dn, "ibm,dbob-id", 0xffffffff);
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chip->pcid = dt_prop_get_u32_def(dn, "ibm,proc-chip-id", 0xffffffff);
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if (dt_prop_get_u32_def(dn, "ibm,occ-functional-state", 0))
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chip->occ_functional = true;
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else
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chip->occ_functional = false;
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list_head_init(&chip->i2cms);
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/* Update the location code for this chip. */
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if (dt_has_node_property(dn, "ibm,loc-code", NULL))
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lc = dt_prop_get(dn, "ibm,loc-code");
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else if (dt_has_node_property(dn, "ibm,slot-location-code", NULL))
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lc = dt_prop_get(dn, "ibm,slot-location-code");
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if (lc)
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chip->loc_code = strdup(lc);
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chip->primary_topology = dt_prop_get_u32_def(dn,
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"ibm,primary-topology-index", 0xffffffff);
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prlog(PR_INFO, "CHIP: Initialised chip %d from %s\n", id, dn->name);
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chips[id] = chip;
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}
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void init_chips(void)
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{
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struct dt_node *xn;
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/* Detect mambo chip */
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if (dt_find_by_path(dt_root, "/mambo")) {
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proc_chip_quirks |= QUIRK_NO_CHIPTOD | QUIRK_MAMBO_CALLOUTS
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| QUIRK_NO_F000F | QUIRK_NO_PBA | QUIRK_NO_OCC_IRQ
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| QUIRK_NO_RNG | QUIRK_NO_DIRECT_CTL | QUIRK_NO_SBE;
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enable_mambo_console();
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prlog(PR_NOTICE, "CHIP: Detected Mambo simulator\n");
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dt_for_each_compatible(dt_root, xn, "ibm,mambo-chip")
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init_chip(xn);
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}
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/* Detect simics */
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if (dt_find_by_path(dt_root, "/simics")) {
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proc_chip_quirks |= QUIRK_SIMICS
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| QUIRK_NO_PBA | QUIRK_NO_OCC_IRQ | QUIRK_SLOW_SIM;
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tb_hz = 512000;
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prlog(PR_NOTICE, "CHIP: Detected Simics simulator\n");
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}
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/* Detect Awan emulator */
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xn = dt_find_by_path(dt_root, "/awan");
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if (xn) {
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const char *model_type;
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proc_chip_quirks |= QUIRK_AWAN | QUIRK_SLOW_SIM | QUIRK_NO_PBA
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| QUIRK_NO_OCC_IRQ;
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tb_hz = 512000;
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model_type = dt_prop_get_def(xn, "device_type", (void *)"core");
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if (strcmp(model_type, "core") == 0) {
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proc_chip_quirks |= QUIRK_NO_RNG | QUIRK_NO_CHIPTOD
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| QUIRK_NO_F000F | QUIRK_NO_SBE;
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}
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prlog(PR_NOTICE, "CHIP: Detected Awan emulator %s model\n",
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model_type);
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}
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/* Detect Qemu */
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if (dt_node_is_compatible(dt_root, "qemu,powernv10") ||
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dt_node_is_compatible(dt_root, "qemu,powernv11")) {
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/* POWER10 and Power11 has direct controls */
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proc_chip_quirks |= QUIRK_QEMU | QUIRK_NO_RNG;
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prlog(PR_NOTICE, "CHIP: Detected QEMU simulator\n");
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} else if (dt_node_is_compatible(dt_root, "qemu,powernv") ||
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dt_node_is_compatible(dt_root, "qemu,powernv8") ||
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dt_node_is_compatible(dt_root, "qemu,powernv9") ||
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dt_find_by_path(dt_root, "/qemu")) {
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proc_chip_quirks |= QUIRK_QEMU | QUIRK_NO_DIRECT_CTL | QUIRK_NO_RNG;
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prlog(PR_NOTICE, "CHIP: Detected QEMU simulator\n");
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}
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if (dt_find_by_path(dt_root, "/bml")) {
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proc_chip_quirks |= QUIRK_BML;
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prlog(PR_NOTICE, "CHIP: Detected BML\n");
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}
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/* We walk the chips based on xscom nodes in the tree */
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dt_for_each_compatible(dt_root, xn, "ibm,xscom") {
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init_chip(xn);
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}
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}
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