86 lines
1.8 KiB
C
86 lines
1.8 KiB
C
// SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
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/*
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* Copyright 2015 IBM Corp.
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*/
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#ifndef __IO_H
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#define __IO_H
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#include <assert.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <libflash/libflash.h>
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/* AST AHB register base */
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#define AHB_REGS_BASE 0x1E600000
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#define AHB_REGS_SIZE 0x00200000
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/* AST GPIO control regs */
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#define GPIO_CTRL_BASE 0x1E780000
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#define GPIO_CTRL_SIZE 0x1000
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/* AST AHB mapping of PNOR */
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#define PNOR_FLASH_BASE 0x30000000
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#define PNOR_FLASH_SIZE 0x04000000
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/* AST AHB mapping of BMC flash */
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#define BMC_FLASH_BASE 0x20000000
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#define BMC_FLASH_SIZE 0x04000000
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/* Address of flash mapping on LPC FW space */
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#define LPC_FLASH_BASE 0x0e000000
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#define LPC_CTRL_BASE 0x1e789000
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static inline uint8_t readb(void *addr)
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{
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asm volatile("" : : : "memory");
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return *(volatile uint8_t *)addr;
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}
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static inline uint16_t readw(void *addr)
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{
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asm volatile("" : : : "memory");
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return *(volatile uint16_t *)addr;
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}
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static inline uint32_t readl(void *addr)
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{
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asm volatile("" : : : "memory");
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return *(volatile uint32_t *)addr;
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}
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static inline void writeb(uint8_t val, void *addr)
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{
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asm volatile("" : : : "memory");
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*(volatile uint8_t *)addr = val;
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}
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static inline void writew(uint16_t val, void *addr)
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{
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asm volatile("" : : : "memory");
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*(volatile uint16_t *)addr = val;
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}
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static inline void writel(uint32_t val, void *addr)
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{
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asm volatile("" : : : "memory");
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*(volatile uint32_t *)addr = val;
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}
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/*
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* AHB register and flash access
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*/
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extern uint32_t ast_ahb_readl(uint32_t offset);
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extern void ast_ahb_writel(uint32_t val, uint32_t offset);
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extern int ast_copy_to_ahb(uint32_t reg, const void *src, uint32_t len);
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extern int ast_copy_from_ahb(void *dst, uint32_t reg, uint32_t len);
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static inline void check_platform(bool *has_sfc, bool *has_ast)
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{
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*has_sfc = false;
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*has_ast = true;
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}
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#endif /* __IO_H */
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