238 lines
9.5 KiB
C++
238 lines
9.5 KiB
C++
/* IBM_PROLOG_BEGIN_TAG */
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/* This is an automatically generated prolog. */
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/* */
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/* $Source: src/import/chips/p10/procedures/utils/stopreg/p10_stop_api.C $ */
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/* */
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/* OpenPOWER HostBoot Project */
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/* */
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/* Contributors Listed Below - COPYRIGHT 2015,2021 */
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/* [+] International Business Machines Corp. */
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/* */
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/* */
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/* Licensed under the Apache License, Version 2.0 (the "License"); */
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/* you may not use this file except in compliance with the License. */
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/* You may obtain a copy of the License at */
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/* */
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/* http://www.apache.org/licenses/LICENSE-2.0 */
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/* */
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/* Unless required by applicable law or agreed to in writing, software */
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/* distributed under the License is distributed on an "AS IS" BASIS, */
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/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
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/* implied. See the License for the specific language governing */
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/* permissions and limitations under the License. */
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/* */
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/* IBM_PROLOG_END_TAG */
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#ifndef __P10_STOP_IMAGE_API_
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#define __P10_STOP_IMAGE_API_
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#include <stdint.h>
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#ifdef __SKIBOOT__
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#include <skiboot.h>
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#endif
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///
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/// @file p10_stop_api.H
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/// @brief describes STOP API which create/manipulate STOP image.
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///
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// *HWP HW Owner : Greg Still <stillgs@us.ibm.com>
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// *HWP FW Owner : Prem Shanker Jha <premjha2@in.ibm.com>
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// *HWP Team : PM
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// *HWP Level : 2
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// *HWP Consumed by : HB:HYP
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#ifdef __cplusplus
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namespace stopImageSection
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{
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#endif
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/**
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* @brief all SPRs and MSR for which register restore is to be supported.
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* @note STOP API design has built in support to accomodate 8 register of
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* scope core and thread each.
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*/
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typedef enum
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{
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PROC_STOP_SPR_DAWR = 180, // thread register
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PROC_STOP_SPR_CIABR = 187, // thread register
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PROC_STOP_SPR_DAWRX = 188, // thread register
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PROC_STOP_SPR_HSPRG0 = 304, // thread register
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PROC_STOP_SPR_HRMOR = 313, // core register
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PROC_STOP_SPR_LPCR = 318, // thread register
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PROC_STOP_SPR_HMEER = 337, // core register
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PROC_STOP_SPR_PTCR = 464, // core register
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PROC_STOP_SPR_USPRG0 = 496, // thread register
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PROC_STOP_SPR_USPRG1 = 497, // thread register
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PROC_STOP_SPR_URMOR = 505, // core register
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PROC_STOP_SPR_SMFCTRL = 511, // thread register
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PROC_STOP_SPR_LDBAR = 850, // thread register
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PROC_STOP_SPR_PSSCR = 855, // thread register
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PROC_STOP_SPR_PMCR = 884, // core register
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PROC_STOP_SPR_HID = 1008, // core register
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PROC_STOP_SPR_MSR = 2000, // thread register
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} CpuReg_t;
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/**
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* @brief lists all the bad error codes.
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*/
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typedef enum
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{
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STOP_SAVE_SUCCESS = 0,
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STOP_SAVE_ARG_INVALID_IMG = 1,
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STOP_SAVE_ARG_INVALID_REG = 2,
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STOP_SAVE_ARG_INVALID_THREAD = 3,
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STOP_SAVE_ARG_INVALID_MODE = 4,
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STOP_SAVE_ARG_INVALID_CORE = 5,
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STOP_SAVE_SPR_ENTRY_NOT_FOUND = 6,
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STOP_SAVE_SPR_ENTRY_UPDATE_FAILED = 7,
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STOP_SAVE_SCOM_INVALID_OPERATION = 8,
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STOP_SAVE_SCOM_INVALID_SECTION = 9,
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STOP_SAVE_SCOM_INVALID_ADDRESS = 10,
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STOP_SAVE_SCOM_INVALID_CHIPLET = 11,
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STOP_SAVE_SCOM_ENTRY_UPDATE_FAILED = 12,
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STOP_SAVE_INVALID_FUSED_CORE_STATUS = 13,
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STOP_SAVE_FAIL = 14, // for internal failure within firmware.
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STOP_SAVE_SPR_ENTRY_MISSING = 15,
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STOP_SAVE_MAX_ENTRY_REACHED = 16,
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STOP_SAVE_SPR_BIT_POS_RESERVE = 17,
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} StopReturnCode_t;
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/**
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* @brief summarizes all operations supported on scom entries of STOP image.
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*/
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typedef enum
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{
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//enum members which are project agnostic
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PROC_STOP_SCOM_OP_MIN = 0,
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PROC_STOP_SCOM_APPEND = 1,
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PROC_STOP_SCOM_REPLACE = 2,
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PROC_STOP_SCOM_OR = 3,
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PROC_STOP_SCOM_AND = 4,
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PROC_STOP_SCOM_NOOP = 5,
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PROC_STOP_SCOM_RESET = 6,
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PROC_STOP_SCOM_OR_APPEND = 7,
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PROC_STOP_SCOM_AND_APPEND = 8,
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PROC_STOP_SCOM_OP_MAX = 9,
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} ScomOperation_t;
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/**
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* @brief All subsections that contain scom entries in a STOP image.
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*/
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typedef enum
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{
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PROC_STOP_SECTION_CORE = 1,
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PROC_STOP_SECTION_L2 = 1,
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PROC_STOP_SECTION_L3 = 2,
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PROC_STOP_SECTION_CACHE = 2,
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} ScomSection_t;
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/**
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* @brief versions pertaining relvant to STOP API.
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*/
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typedef enum
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{
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STOP_API_VER = 0x00,
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STOP_API_VER_CONTROL = 0x02,
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} VersionList_t;
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/**
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* @brief Summarizes bit position allocated to SPRs in save bit mask vector.
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*/
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typedef enum
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{
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BIT_POS_CIABR = 0,
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BIT_POS_DAWR = 1,
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BIT_POS_DAWRX = 2,
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BIT_POS_HSPRG0 = 3,
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BIT_POS_LDBAR = 4,
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BIT_POS_LPCR = 5,
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BIT_POS_PSSCR = 6,
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BIT_POS_MSR = 7,
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BIT_POS_HID = 21,
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BIT_POS_HMEER = 22,
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BIT_POS_PMCR = 23,
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BIT_POS_PTCR = 24,
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BIT_POS_SMFCTRL = 28,
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BIT_POS_USPRG0 = 29,
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BIT_POS_USPRG1 = 30,
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} SprBitPositionList_t;
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief creates SCOM restore entry for a given scom adress in HOMER.
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* @param i_pImage points to start address of HOMER image.
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* @param i_scomAddress address associated with SCOM restore entry.
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* @param i_scomData data associated with SCOM restore entry.
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* @param i_operation operation type requested for API.
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* @param i_section section of HOMER in which restore entry needs to be created.
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* @return STOP_SAVE_SUCCESS if API succeeds, error code otherwise.
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* @note It is an API for creating SCOM restore entry in HOMER. It is agnostic to
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* generation of POWER processor.
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*/
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StopReturnCode_t proc_stop_save_scom( void* const i_pImage,
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const uint32_t i_scomAddress,
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const uint64_t i_scomData,
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const ScomOperation_t i_operation,
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const ScomSection_t i_section );
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/**
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* @brief initializes self save restore region of HOMER.
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* @param[in] i_pImage points to base of HOMER image.
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* @param[in] i_corePos position of the physical core.
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* @return STOP_SAVE_SUCCESS if API succeeds, error code otherwise.
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* @note It is an API for initializing self restore region in HOMER. It is agnostic to
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* generation of POWER processor.
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*/
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StopReturnCode_t proc_stop_init_cpureg( void* const i_pImage, const uint32_t i_corePos );
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/**
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* @brief enables self save for a given set of SPRs
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* @param[in] i_pImage points to start address of HOMER image.
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* @param[in] i_pir PIR value associated with core and thread.
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* @param[in] i_saveRegVector bit vector representing the SPRs that needs to be self saved.
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* @return STOP_SAVE_SUCCESS if API succeeds, error code otherwise.
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* @note It is an API for enabling self save of SPRs and it is agnostic to
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* generation of POWER processor.
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*/
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StopReturnCode_t proc_stop_save_cpureg_control( void* i_pImage,
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const uint64_t i_pir,
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const uint32_t i_saveRegVector );
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/**
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* @brief creates an SPR restore entry in HOMER
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* @param[in] i_pImage points to start address of HOMER image.
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* @param[in] i_regId SPR number to be saved in HOMER
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* @param[in] i_regData SPR data to be saved in HOMER
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* @param[in] i_pir PIR value associated with core and thread.
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* @return STOP_SAVE_SUCCESS if API succeeds, error code otherwise.
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* @note It is an API for enabling self save of SPRs and it is agnostic to
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* generation of POWER processor.
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*/
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StopReturnCode_t proc_stop_save_cpureg( void* const i_pImage,
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const CpuReg_t i_regId,
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const uint64_t i_regData,
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const uint64_t i_pir );
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/**
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* @brief initializes self-save region with specific instruction.
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* @param[in] i_pImage points to start address of HOMER image.
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* @param[in] i_corePos physical core's relative position within processor chip.
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* @return STOP_SAVE_SUCCESS if self-save is initialized successfully,
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* error code otherwise.
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* @note API is project agnostic and is intended only for use case of HOMER build.
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* There is no explicit effort to support any other use case.
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*/
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StopReturnCode_t proc_stop_init_self_save( void* const i_pImage, const uint32_t i_corePos );
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#ifdef __cplusplus
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} // extern "C"
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}; // namespace stopImageSection ends
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#endif //__cplusplus
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#endif //__P10_STOP_IMAGE_API_
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