56 lines
2.3 KiB
C
56 lines
2.3 KiB
C
/*
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* Tiny Code Generator for QEMU
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*
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* Copyright (c) 2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef PPC_TCG_TARGET_H
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#define PPC_TCG_TARGET_H
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#define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1)
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#define TCG_TARGET_NB_REGS 64
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#define TCG_TARGET_INSN_UNIT_SIZE 4
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typedef enum {
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TCG_REG_R0, TCG_REG_R1, TCG_REG_R2, TCG_REG_R3,
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TCG_REG_R4, TCG_REG_R5, TCG_REG_R6, TCG_REG_R7,
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TCG_REG_R8, TCG_REG_R9, TCG_REG_R10, TCG_REG_R11,
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TCG_REG_R12, TCG_REG_R13, TCG_REG_R14, TCG_REG_R15,
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TCG_REG_R16, TCG_REG_R17, TCG_REG_R18, TCG_REG_R19,
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TCG_REG_R20, TCG_REG_R21, TCG_REG_R22, TCG_REG_R23,
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TCG_REG_R24, TCG_REG_R25, TCG_REG_R26, TCG_REG_R27,
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TCG_REG_R28, TCG_REG_R29, TCG_REG_R30, TCG_REG_R31,
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TCG_REG_V0, TCG_REG_V1, TCG_REG_V2, TCG_REG_V3,
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TCG_REG_V4, TCG_REG_V5, TCG_REG_V6, TCG_REG_V7,
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TCG_REG_V8, TCG_REG_V9, TCG_REG_V10, TCG_REG_V11,
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TCG_REG_V12, TCG_REG_V13, TCG_REG_V14, TCG_REG_V15,
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TCG_REG_V16, TCG_REG_V17, TCG_REG_V18, TCG_REG_V19,
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TCG_REG_V20, TCG_REG_V21, TCG_REG_V22, TCG_REG_V23,
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TCG_REG_V24, TCG_REG_V25, TCG_REG_V26, TCG_REG_V27,
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TCG_REG_V28, TCG_REG_V29, TCG_REG_V30, TCG_REG_V31,
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TCG_REG_CALL_STACK = TCG_REG_R1,
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TCG_AREG0 = TCG_REG_R27
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} TCGReg;
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#endif
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