275 lines
9.7 KiB
Text
275 lines
9.7 KiB
Text
;; @file
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; CPUM - CPU Monitor, Assembly header file.
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;
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;
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; Copyright (C) 2006-2023 Oracle and/or its affiliates.
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;
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; This file is part of VirtualBox base platform packages, as
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; available from https://www.virtualbox.org.
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;
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; This program is free software; you can redistribute it and/or
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; modify it under the terms of the GNU General Public License
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; as published by the Free Software Foundation, in version 3 of the
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; License.
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;
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; This program is distributed in the hope that it will be useful, but
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; WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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; General Public License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with this program; if not, see <https://www.gnu.org/licenses>.
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;
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; The contents of this file may alternatively be used under the terms
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; of the Common Development and Distribution License Version 1.0
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; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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; in the VirtualBox distribution, in which case the provisions of the
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; CDDL are applicable instead of those of the GPL.
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;
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; You may elect to license modified versions of this file under the
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; terms and conditions of either the GPL or the CDDL or both.
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;
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; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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;
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%ifndef ___VBox_vmm_cpum_mac__
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%define ___VBox_vmm_cpum_mac__
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%include "iprt/asmdefs.mac"
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;;
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; The volatile XSAVE components when VBOX_WITH_KERNEL_USING_XMM is active.
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; @note ASSUMED to be at the most 32-bit in width at the moment.
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%ifdef VBOX_WITH_KERNEL_USING_XMM
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%define CPUM_VOLATILE_XSAVE_GUEST_COMPONENTS (XSAVE_C_SSE | XSAVE_C_YMM | XSAVE_C_ZMM_HI256 | XSAVE_C_ZMM_16HI)
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%endif
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;;
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; CPUID leaf.
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; @remarks This structure is used by the patch manager and can only be extended
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; by adding to the end of it.
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struc CPUMCPUIDLEAF
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.uLeaf resd 1
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.uSubLeaf resd 1
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.fSubLeafMask resd 1
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.uEax resd 1
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.uEbx resd 1
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.uEcx resd 1
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.uEdx resd 1
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.fFlags resd 1
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endstruc
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%define CPUMCPUIDLEAF_F_INTEL_TOPOLOGY_SUBLEAVES RT_BIT_32(0)
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%define CPUMCPUIDLEAF_F_CONTAINS_APIC_ID RT_BIT_32(1)
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%define CPUMCPUIDLEAF_F_CONTAINS_OSXSAVE RT_BIT_32(2)
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%define CPUMCPUIDLEAF_F_CONTAINS_APIC RT_BIT_32(3)
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;;
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; For the default CPUID leaf value.
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; @remarks This is used by the patch manager and cannot be modified in any way.
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struc CPUMCPUID
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.uEax resd 1
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.uEbx resd 1
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.uEcx resd 1
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.uEdx resd 1
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endstruc
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;; @name Method used to deal with unknown CPUID leaves.
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;; @{
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%define CPUMUNKNOWNCPUID_DEFAULTS 1
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%define CPUMUNKNOWNCPUID_LAST_STD_LEAF 2
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%define CPUMUNKNOWNCPUID_LAST_STD_LEAF_WITH_ECX 3
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%define CPUMUNKNOWNCPUID_PASSTHRU 4
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;; @}
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%define XSTATE_SIZE 8192
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;; Note! Updates here must be reflected in CPUMInternal.mac too!
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struc CPUMCTX
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.eax resq 1
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.ecx resq 1
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.edx resq 1
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.ebx resq 1
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.esp resq 1
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.ebp resq 1
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.esi resq 1
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.edi resq 1
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.r8 resq 1
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.r9 resq 1
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.r10 resq 1
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.r11 resq 1
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.r12 resq 1
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.r13 resq 1
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.r14 resq 1
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.r15 resq 1
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.es.Sel resw 1
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.es.PaddingSel resw 1
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.es.ValidSel resw 1
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.es.fFlags resw 1
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.es.u64Base resq 1
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.es.u32Limit resd 1
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.es.Attr resd 1
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.cs.Sel resw 1
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.cs.PaddingSel resw 1
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.cs.ValidSel resw 1
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.cs.fFlags resw 1
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.cs.u64Base resq 1
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.cs.u32Limit resd 1
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.cs.Attr resd 1
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.ss.Sel resw 1
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.ss.PaddingSel resw 1
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.ss.ValidSel resw 1
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.ss.fFlags resw 1
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.ss.u64Base resq 1
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.ss.u32Limit resd 1
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.ss.Attr resd 1
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.ds.Sel resw 1
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.ds.PaddingSel resw 1
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.ds.ValidSel resw 1
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.ds.fFlags resw 1
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.ds.u64Base resq 1
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.ds.u32Limit resd 1
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.ds.Attr resd 1
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.fs.Sel resw 1
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.fs.PaddingSel resw 1
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.fs.ValidSel resw 1
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.fs.fFlags resw 1
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.fs.u64Base resq 1
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.fs.u32Limit resd 1
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.fs.Attr resd 1
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.gs.Sel resw 1
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.gs.PaddingSel resw 1
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.gs.ValidSel resw 1
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.gs.fFlags resw 1
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.gs.u64Base resq 1
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.gs.u32Limit resd 1
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.gs.Attr resd 1
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.ldtr.Sel resw 1
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.ldtr.PaddingSel resw 1
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.ldtr.ValidSel resw 1
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.ldtr.fFlags resw 1
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.ldtr.u64Base resq 1
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.ldtr.u32Limit resd 1
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.ldtr.Attr resd 1
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.tr.Sel resw 1
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.tr.PaddingSel resw 1
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.tr.ValidSel resw 1
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.tr.fFlags resw 1
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.tr.u64Base resq 1
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.tr.u32Limit resd 1
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.tr.Attr resd 1
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alignb 8
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.eip resq 1
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.eflags resq 1
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.fExtrn resq 1
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.uRipInhibitInt resq 1
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.cr0 resq 1
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.cr2 resq 1
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.cr3 resq 1
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.cr4 resq 1
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.dr resq 8
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.gdtrPadding resw 3
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.gdtr resw 0
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.gdtr.cbGdt resw 1
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.gdtr.pGdt resq 1
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.idtrPadding resw 3
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.idtr resw 0
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.idtr.cbIdt resw 1
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.idtr.pIdt resq 1
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.SysEnter.cs resb 8
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.SysEnter.eip resb 8
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.SysEnter.esp resb 8
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.msrEFER resb 8
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.msrSTAR resb 8
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.msrPAT resb 8
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.msrLSTAR resb 8
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.msrCSTAR resb 8
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.msrSFMASK resb 8
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.msrKERNELGSBASE resb 8
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alignb 32
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.aPaePdpes resq 4
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alignb 8
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.aXcr resq 2
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.fXStateMask resq 1
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.fUsedFpuGuest resb 1
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alignb 8
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.aoffXState resw 64
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alignb 256
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.abXState resb 0x4000-0x300
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.XState EQU .abXState
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alignb 4096
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.hwvirt resb 0
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.hwvirt.svm resb 0
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.hwvirt.vmx resb 0
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.hwvirt.svm.Vmcb EQU .hwvirt.svm
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.hwvirt.svm.abMsrBitmap EQU (.hwvirt.svm.Vmcb + 0x1000)
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.hwvirt.svm.abIoBitmap EQU (.hwvirt.svm.abMsrBitmap + 0x2000)
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.hwvirt.svm.uMsrHSavePa EQU (.hwvirt.svm.abIoBitmap + 0x3000) ; resq 1
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.hwvirt.svm.GCPhysVmcb EQU (.hwvirt.svm.uMsrHSavePa + 8) ; resq 1
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alignb 8
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.hwvirt.svm.HostState EQU (.hwvirt.svm.GCPhysVmcb + 8) ; resb 184
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.hwvirt.svm.uPrevPauseTick EQU (.hwvirt.svm.HostState + 184) ; resq 1
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.hwvirt.svm.cPauseFilter EQU (.hwvirt.svm.uPrevPauseTick + 8) ; resw 1
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.hwvirt.svm.cPauseFilterThreshold EQU (.hwvirt.svm.cPauseFilter + 2) ; resw 1
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.hwvirt.svm.fInterceptEvents EQU (.hwvirt.svm.cPauseFilterThreshold + 2) ; resb 1
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.hwvirt.vmx.Vmcs resb 0x1000
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.hwvirt.vmx.ShadowVmcs resb 0x1000
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.hwvirt.vmx.abVmreadBitmap resb 0x1000
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.hwvirt.vmx.abVmwriteBitmap resb 0x1000
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.hwvirt.vmx.aEntryMsrLoadArea resb 0x2000
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.hwvirt.vmx.aExitMsrStoreArea resb 0x2000
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.hwvirt.vmx.aExitMsrLoadArea resb 0x2000
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.hwvirt.vmx.abMsrBitmap resb 0x1000
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.hwvirt.vmx.abIoBitmap resb 0x1000+0x1000
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alignb 8
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.hwvirt.vmx.GCPhysVmxon resq 1
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.hwvirt.vmx.GCPhysVmcs resq 1
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.hwvirt.vmx.GCPhysShadowVmcs resq 1
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.hwvirt.vmx.enmDiag resd 1
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.hwvirt.vmx.enmAbort resd 1
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.hwvirt.vmx.uDiagAux resq 1
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.hwvirt.vmx.uAbortAux resd 1
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.hwvirt.vmx.fInVmxRootMode resb 1
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.hwvirt.vmx.fInVmxNonRootMode resb 1
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.hwvirt.vmx.fInterceptEvents resb 1
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.hwvirt.vmx.fNmiUnblockingIret resb 1
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.hwvirt.vmx.uFirstPauseLoopTick resq 1
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.hwvirt.vmx.uPrevPauseTick resq 1
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.hwvirt.vmx.uEntryTick resq 1
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.hwvirt.vmx.offVirtApicWrite resw 1
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.hwvirt.vmx.fVirtNmiBlocking resb 1
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alignb 8
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.hwvirt.vmx.Msrs resb 224
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alignb 8
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.hwvirt.enmHwvirt resd 1
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.hwvirt.fGif resb 1
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alignb 4
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.hwvirt.fSavedInhibit resd 1
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alignb 64
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endstruc
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%define CPUMSELREG_FLAGS_VALID 0x0001
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%define CPUMSELREG_FLAGS_STALE 0x0002
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%define CPUMSELREG_FLAGS_VALID_MASK 0x0003
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;;
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; Guest MSR state.
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struc CPUMCTXMSRS
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.au64 resq 64
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endstruc
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%endif
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