803 lines
28 KiB
C
803 lines
28 KiB
C
/** @file
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* PCI - The PCI Controller And Devices. (DEV)
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*/
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/*
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* Copyright (C) 2006-2023 Oracle and/or its affiliates.
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*
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* This file is part of VirtualBox base platform packages, as
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* available from https://www.virtualbox.org.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, in version 3 of the
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* License.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <https://www.gnu.org/licenses>.
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*
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* The contents of this file may alternatively be used under the terms
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* of the Common Development and Distribution License Version 1.0
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* (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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* in the VirtualBox distribution, in which case the provisions of the
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* CDDL are applicable instead of those of the GPL.
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*
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* You may elect to license modified versions of this file under the
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* terms and conditions of either the GPL or the CDDL or both.
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*
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* SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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*/
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#ifndef VBOX_INCLUDED_vmm_pdmpcidev_h
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#define VBOX_INCLUDED_vmm_pdmpcidev_h
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#ifndef RT_WITHOUT_PRAGMA_ONCE
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# pragma once
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#endif
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#include <VBox/pci.h>
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#include <iprt/assert.h>
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/** @defgroup grp_pdm_pcidev PDM PCI Device
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* @ingroup grp_pdm_device
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* @{
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*/
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/**
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* Callback function for intercept reading from the PCI configuration space.
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*
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* @returns VINF_SUCCESS or PDMDevHlpDBGFStop status (maybe others later).
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* @retval VINF_PDM_PCI_DO_DEFAULT to do default read (same as calling
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* PDMDevHlpPCIConfigRead()).
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*
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* @param pDevIns Pointer to the device instance the PCI device
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* belongs to.
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* @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
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* @param uAddress The configuration space register address. [0..4096]
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* @param cb The register size. [1,2,4]
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* @param pu32Value Where to return the register value.
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*
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* @remarks Called with the PDM lock held. The device lock is NOT take because
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* that is very likely be a lock order violation.
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*/
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typedef DECLCALLBACKTYPE(VBOXSTRICTRC, FNPCICONFIGREAD,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
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uint32_t uAddress, unsigned cb, uint32_t *pu32Value));
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/** Pointer to a FNPCICONFIGREAD() function. */
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typedef FNPCICONFIGREAD *PFNPCICONFIGREAD;
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#if !RT_CLANG_PREREQ(11, 0) /* Clang 11 (at least) has trouble with nothrow and pointers to function pointers. */
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/** Pointer to a PFNPCICONFIGREAD. */
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typedef PFNPCICONFIGREAD *PPFNPCICONFIGREAD;
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#endif
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/**
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* Callback function for writing to the PCI configuration space.
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*
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* @returns VINF_SUCCESS or PDMDevHlpDBGFStop status (maybe others later).
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* @retval VINF_PDM_PCI_DO_DEFAULT to do default read (same as calling
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* PDMDevHlpPCIConfigWrite()).
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*
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* @param pDevIns Pointer to the device instance the PCI device
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* belongs to.
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* @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
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* @param uAddress The configuration space register address. [0..4096]
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* @param cb The register size. [1,2,4]
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* @param u32Value The value that's being written. The number of bits actually used from
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* this value is determined by the cb parameter.
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*
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* @remarks Called with the PDM lock held. The device lock is NOT take because
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* that is very likely be a lock order violation.
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*/
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typedef DECLCALLBACKTYPE(VBOXSTRICTRC, FNPCICONFIGWRITE,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
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uint32_t uAddress, unsigned cb, uint32_t u32Value));
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/** Pointer to a FNPCICONFIGWRITE() function. */
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typedef FNPCICONFIGWRITE *PFNPCICONFIGWRITE;
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#if !RT_CLANG_PREREQ(11, 0) /* Clang 11 (at least) has trouble with nothrow and pointers to function pointers. */
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/** Pointer to a PFNPCICONFIGWRITE. */
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typedef PFNPCICONFIGWRITE *PPFNPCICONFIGWRITE;
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#endif
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/**
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* Callback function for mapping an PCI I/O region.
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*
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* This is called when a PCI I/O region is mapped, and for new-style devices
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* also when unmapped (address set to NIL_RTGCPHYS). For new-style devices,
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* this callback is optional as the PCI bus calls IOM to map and unmap the
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* regions.
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*
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* Old style devices have to call IOM to map the region themselves, while
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* unmapping is done by the PCI bus like with the new style devices.
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*
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* @returns VBox status code.
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* @retval VINF_PCI_MAPPING_DONE if the caller already did the mapping and the
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* PCI bus should not use the handle it got to do the registration
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* again. (Only allowed when @a GCPhysAddress is not NIL_RTGCPHYS.)
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*
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* @param pDevIns Pointer to the device instance the PCI device
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* belongs to.
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* @param pPciDev Pointer to the PCI device.
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* @param iRegion The region number.
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* @param GCPhysAddress Physical address of the region. If @a enmType is
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* PCI_ADDRESS_SPACE_IO, this is an I/O port, otherwise
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* it's a physical address.
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*
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* NIL_RTGCPHYS indicates that a mapping is about to be
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* unmapped and that the device deregister access
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* handlers for it and update its internal state to
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* reflect this.
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*
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* @param cb Size of the region in bytes.
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* @param enmType One of the PCI_ADDRESS_SPACE_* values.
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*
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* @remarks Called with the PDM lock held. The device lock is NOT take because
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* that is very likely be a lock order violation.
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*/
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typedef DECLCALLBACKTYPE(int, FNPCIIOREGIONMAP,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
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RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType));
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/** Pointer to a FNPCIIOREGIONMAP() function. */
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typedef FNPCIIOREGIONMAP *PFNPCIIOREGIONMAP;
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/**
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* Sets the size and type for old saved states from within a
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* PDMPCIDEV::pfnRegionLoadChangeHookR3 callback.
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*
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* @returns VBox status code.
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* @param pPciDev Pointer to the PCI device.
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* @param iRegion The region number.
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* @param cbRegion The region size.
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* @param enmType Combination of the PCI_ADDRESS_SPACE_* values.
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*/
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typedef DECLCALLBACKTYPE(int, FNPCIIOREGIONOLDSETTER,(PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion,
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PCIADDRESSSPACE enmType));
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/** Pointer to a FNPCIIOREGIONOLDSETTER() function. */
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typedef FNPCIIOREGIONOLDSETTER *PFNPCIIOREGIONOLDSETTER;
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/**
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* Swaps two PCI I/O regions from within a PDMPCIDEV::pfnRegionLoadChangeHookR3
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* callback.
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*
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* @returns VBox status code.
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* @param pPciDev Pointer to the PCI device.
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* @param iRegion The region number.
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* @param iOtherRegion The number of the region swap with.
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* @sa @bugref{9359}
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*/
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typedef DECLCALLBACKTYPE(int, FNPCIIOREGIONSWAP,(PPDMPCIDEV pPciDev, uint32_t iRegion, uint32_t iOtherRegion));
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/** Pointer to a FNPCIIOREGIONSWAP() function. */
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typedef FNPCIIOREGIONSWAP *PFNPCIIOREGIONSWAP;
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/*
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* Hack to include the PDMPCIDEVINT structure at the right place
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* to avoid duplications of FNPCIIOREGIONMAP and such.
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*/
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#ifdef PDMPCIDEV_INCLUDE_PRIVATE
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# include "pdmpcidevint.h"
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#endif
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/**
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* PDM PCI Device structure.
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*
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* A PCI device belongs to a PDM device. A PDM device may have zero or more PCI
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* devices associated with it. The first PCI device that it registers
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* automatically becomes the default PCI device and can be used implicitly
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* with the device helper APIs. Subsequent PCI devices must be specified
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* explicitly to the device helper APIs when used.
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*/
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typedef struct PDMPCIDEV
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{
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/** @name Read only data.
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* @{
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*/
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/** Magic number (PDMPCIDEV_MAGIC). */
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uint32_t u32Magic;
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/** PCI device number [11:3] and function [2:0] on the pci bus.
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* @sa VBOX_PCI_DEVFN_MAKE, VBOX_PCI_DEVFN_FUN_MASK, VBOX_PCI_DEVFN_DEV_SHIFT */
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uint32_t uDevFn;
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/** Size of the valid config space (we always allocate 4KB). */
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uint16_t cbConfig;
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/** Size of the MSI-X state data optionally following the config space. */
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uint16_t cbMsixState;
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/** Index into the PDMDEVINS::apPciDev array. */
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uint16_t idxSubDev;
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uint16_t u16Padding;
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/** Device name. */
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R3PTRTYPE(const char *) pszNameR3;
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/** @} */
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/**
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* Callback for dealing with size changes.
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*
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* This is set by the PCI device when needed. It is only needed if any changes
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* in the PCI resources have been made that may be incompatible with saved state
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* (i.e. does not reflect configuration, but configuration defaults changed).
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*
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* The implementation can use PDMDevHlpMMIOExReduce to adjust the resource
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* allocation down in size. There is currently no way of growing resources.
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* Dropping a resource is automatic.
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*
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* @returns VBox status code.
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* @param pDevIns Pointer to the device instance the PCI device
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* belongs to.
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* @param pPciDev Pointer to the PCI device.
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* @param iRegion The region number or UINT32_MAX if old saved state call.
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* @param cbRegion The size being loaded, RTGCPHYS_MAX if old saved state
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* call, or 0 for dummy 64-bit top half region.
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* @param enmType The type being loaded, -1 if old saved state call, or
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* 0xff if dummy 64-bit top half region.
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* @param pfnOldSetter Callback for setting size and type for call
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* regarding old saved states. NULL otherwise.
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* @param pfnSwapRegions Used to swaps two regions. The second one must be a
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* higher number than @a iRegion. NULL if old saved
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* state.
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*/
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DECLR3CALLBACKMEMBER(int, pfnRegionLoadChangeHookR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
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uint64_t cbRegion, PCIADDRESSSPACE enmType,
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PFNPCIIOREGIONOLDSETTER pfnOldSetter,
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PFNPCIIOREGIONSWAP pfnSwapRegion));
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/** Reserved for future stuff. */
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uint64_t au64Reserved[4 + (R3_ARCH_BITS == 32 ? 1 : 0)];
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/** Internal data. */
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union
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{
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#ifdef PDMPCIDEVINT_DECLARED
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PDMPCIDEVINT s;
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#endif
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uint8_t padding[0x180];
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} Int;
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/** PCI config space.
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* This is either 256 or 4096 in size. In the latter case it may be
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* followed by a MSI-X state area. */
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uint8_t abConfig[4096];
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/** The MSI-X state data. Optional. */
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RT_FLEXIBLE_ARRAY_EXTENSION
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uint8_t abMsixState[RT_FLEXIBLE_ARRAY];
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} PDMPCIDEV;
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#ifdef PDMPCIDEVINT_DECLARED
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AssertCompile(RT_SIZEOFMEMB(PDMPCIDEV, Int.s) <= RT_SIZEOFMEMB(PDMPCIDEV, Int.padding));
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#endif
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/** Magic number of PDMPCIDEV::u32Magic (Margaret Eleanor Atwood). */
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#define PDMPCIDEV_MAGIC UINT32_C(0x19391118)
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/** Checks that the PCI device structure is valid and belongs to the device
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* instance, but does not return. */
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#ifdef VBOX_STRICT
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# define PDMPCIDEV_ASSERT_VALID(a_pDevIns, a_pPciDev) \
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do { \
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uintptr_t const offPciDevInTable = (uintptr_t)(a_pPciDev) - (uintptr_t)pDevIns->apPciDevs[0]; \
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uint32_t const cbPciDevTmp = pDevIns->cbPciDev; \
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ASMCompilerBarrier(); \
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AssertMsg( offPciDevInTable < pDevIns->cPciDevs * cbPciDevTmp \
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&& cbPciDevTmp >= RT_UOFFSETOF(PDMPCIDEV, abConfig) + 256 \
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&& offPciDevInTable % cbPciDevTmp == 0, \
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("pPciDev=%p apPciDevs[0]=%p offPciDevInTable=%p cPciDevs=%#x cbPciDev=%#x\n", \
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(a_pPciDev), pDevIns->apPciDevs[0], offPciDevInTable, pDevIns->cPciDevs, cbPciDevTmp)); \
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AssertPtr((a_pPciDev)); \
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AssertMsg((a_pPciDev)->u32Magic == PDMPCIDEV_MAGIC, ("%#x\n", (a_pPciDev)->u32Magic)); \
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} while (0)
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#else
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# define PDMPCIDEV_ASSERT_VALID(a_pDevIns, a_pPciDev) do { } while (0)
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#endif
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/** Checks that the PCI device structure is valid, belongs to the device
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* instance and that it is registered, but does not return. */
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#ifdef VBOX_STRICT
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# define PDMPCIDEV_ASSERT_VALID_AND_REGISTERED(a_pDevIns, a_pPciDev) \
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do { \
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PDMPCIDEV_ASSERT_VALID(a_pDevIns, a_pPciDev); \
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Assert((a_pPciDev)->Int.s.fRegistered); \
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} while (0)
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#else
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# define PDMPCIDEV_ASSERT_VALID_AND_REGISTERED(a_pDevIns, a_pPciDev) do { } while (0)
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#endif
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/** Checks that the PCI device structure is valid and belongs to the device
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* instance, returns appropriate status code if not valid. */
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#define PDMPCIDEV_ASSERT_VALID_RET(a_pDevIns, a_pPciDev) \
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do { \
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uintptr_t const offPciDevInTable = (uintptr_t)(a_pPciDev) - (uintptr_t)pDevIns->apPciDevs[0]; \
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uint32_t const cbPciDevTmp = pDevIns->cbPciDev; \
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ASMCompilerBarrier(); \
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AssertMsgReturn( offPciDevInTable < pDevIns->cPciDevs * cbPciDevTmp \
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&& cbPciDevTmp >= RT_UOFFSETOF(PDMPCIDEV, abConfig) + 256 \
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&& offPciDevInTable % cbPciDevTmp == 0, \
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("pPciDev=%p apPciDevs[0]=%p offPciDevInTable=%p cPciDevs=%#x cbPciDev=%#x\n", \
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(a_pPciDev), pDevIns->apPciDevs[0], offPciDevInTable, pDevIns->cPciDevs, cbPciDevTmp), \
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VERR_PDM_NOT_PCI_DEVICE); \
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AssertMsgReturn((a_pPciDev)->u32Magic == PDMPCIDEV_MAGIC, ("%#x\n", (a_pPciDev)->u32Magic), VERR_PDM_NOT_PCI_DEVICE); \
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AssertReturn((a_pPciDev)->Int.s.fRegistered, VERR_PDM_NOT_PCI_DEVICE); \
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} while (0)
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/** @name PDM PCI config space accessor function.
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* @{
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*/
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/** @todo handle extended space access. */
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DECLINLINE(void) PDMPciDevSetByte(PPDMPCIDEV pPciDev, uint32_t offReg, uint8_t u8Value)
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{
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Assert(offReg < sizeof(pPciDev->abConfig));
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pPciDev->abConfig[offReg] = u8Value;
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}
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DECLINLINE(uint8_t) PDMPciDevGetByte(PCPDMPCIDEV pPciDev, uint32_t offReg)
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{
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Assert(offReg < sizeof(pPciDev->abConfig));
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return pPciDev->abConfig[offReg];
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}
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DECLINLINE(void) PDMPciDevSetWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint16_t u16Value)
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{
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Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
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*(uint16_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U16(u16Value);
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}
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DECLINLINE(uint16_t) PDMPciDevGetWord(PCPDMPCIDEV pPciDev, uint32_t offReg)
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{
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uint16_t u16Value;
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Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
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u16Value = *(uint16_t*)&pPciDev->abConfig[offReg];
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return RT_H2LE_U16(u16Value);
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}
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DECLINLINE(void) PDMPciDevSetDWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint32_t u32Value)
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{
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Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
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*(uint32_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U32(u32Value);
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}
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DECLINLINE(uint32_t) PDMPciDevGetDWord(PCPDMPCIDEV pPciDev, uint32_t offReg)
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{
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uint32_t u32Value;
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Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
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u32Value = *(uint32_t*)&pPciDev->abConfig[offReg];
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return RT_H2LE_U32(u32Value);
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}
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DECLINLINE(void) PDMPciDevSetQWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint64_t u64Value)
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{
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Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
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*(uint64_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U64(u64Value);
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}
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DECLINLINE(uint64_t) PDMPciDevGetQWord(PCPDMPCIDEV pPciDev, uint32_t offReg)
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{
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uint64_t u64Value;
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Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
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u64Value = *(uint64_t*)&pPciDev->abConfig[offReg];
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return RT_H2LE_U64(u64Value);
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}
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/**
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* Sets the vendor id config register.
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* @param pPciDev The PCI device.
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* @param u16VendorId The vendor id.
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*/
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DECLINLINE(void) PDMPciDevSetVendorId(PPDMPCIDEV pPciDev, uint16_t u16VendorId)
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{
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PDMPciDevSetWord(pPciDev, VBOX_PCI_VENDOR_ID, u16VendorId);
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}
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/**
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* Gets the vendor id config register.
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* @returns the vendor id.
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* @param pPciDev The PCI device.
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*/
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DECLINLINE(uint16_t) PDMPciDevGetVendorId(PCPDMPCIDEV pPciDev)
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{
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return PDMPciDevGetWord(pPciDev, VBOX_PCI_VENDOR_ID);
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}
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/**
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* Sets the device id config register.
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* @param pPciDev The PCI device.
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* @param u16DeviceId The device id.
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*/
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DECLINLINE(void) PDMPciDevSetDeviceId(PPDMPCIDEV pPciDev, uint16_t u16DeviceId)
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{
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PDMPciDevSetWord(pPciDev, VBOX_PCI_DEVICE_ID, u16DeviceId);
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}
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/**
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* Gets the device id config register.
|
|
* @returns the device id.
|
|
* @param pPciDev The PCI device.
|
|
*/
|
|
DECLINLINE(uint16_t) PDMPciDevGetDeviceId(PCPDMPCIDEV pPciDev)
|
|
{
|
|
return PDMPciDevGetWord(pPciDev, VBOX_PCI_DEVICE_ID);
|
|
}
|
|
|
|
/**
|
|
* Sets the command config register.
|
|
*
|
|
* @param pPciDev The PCI device.
|
|
* @param u16Command The command register value.
|
|
*/
|
|
DECLINLINE(void) PDMPciDevSetCommand(PPDMPCIDEV pPciDev, uint16_t u16Command)
|
|
{
|
|
PDMPciDevSetWord(pPciDev, VBOX_PCI_COMMAND, u16Command);
|
|
}
|
|
|
|
|
|
/**
|
|
* Gets the command config register.
|
|
* @returns The command register value.
|
|
* @param pPciDev The PCI device.
|
|
*/
|
|
DECLINLINE(uint16_t) PDMPciDevGetCommand(PCPDMPCIDEV pPciDev)
|
|
{
|
|
return PDMPciDevGetWord(pPciDev, VBOX_PCI_COMMAND);
|
|
}
|
|
|
|
/**
|
|
* Checks if the given PCI device is a bus master.
|
|
* @returns true if the device is a bus master, false if not.
|
|
* @param pPciDev The PCI device.
|
|
*/
|
|
DECLINLINE(bool) PDMPciDevIsBusmaster(PCPDMPCIDEV pPciDev)
|
|
{
|
|
return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_MASTER) != 0;
|
|
}
|
|
|
|
/**
|
|
* Checks if INTx interrupts disabled in the command config register.
|
|
* @returns true if disabled.
|
|
* @param pPciDev The PCI device.
|
|
*/
|
|
DECLINLINE(bool) PDMPciDevIsIntxDisabled(PCPDMPCIDEV pPciDev)
|
|
{
|
|
return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_INTX_DISABLE) != 0;
|
|
}
|
|
|
|
/**
|
|
* Gets the status config register.
|
|
*
|
|
* @returns status config register.
|
|
* @param pPciDev The PCI device.
|
|
*/
|
|
DECLINLINE(uint16_t) PDMPciDevGetStatus(PCPDMPCIDEV pPciDev)
|
|
{
|
|
return PDMPciDevGetWord(pPciDev, VBOX_PCI_STATUS);
|
|
}
|
|
|
|
/**
|
|
* Sets the status config register.
|
|
*
|
|
* @param pPciDev The PCI device.
|
|
* @param u16Status The status register value.
|
|
*/
|
|
DECLINLINE(void) PDMPciDevSetStatus(PPDMPCIDEV pPciDev, uint16_t u16Status)
|
|
{
|
|
PDMPciDevSetWord(pPciDev, VBOX_PCI_STATUS, u16Status);
|
|
}
|
|
|
|
|
|
/**
|
|
* Sets the revision id config register.
|
|
*
|
|
* @param pPciDev The PCI device.
|
|
* @param u8RevisionId The revision id.
|
|
*/
|
|
DECLINLINE(void) PDMPciDevSetRevisionId(PPDMPCIDEV pPciDev, uint8_t u8RevisionId)
|
|
{
|
|
PDMPciDevSetByte(pPciDev, VBOX_PCI_REVISION_ID, u8RevisionId);
|
|
}
|
|
|
|
|
|
/**
|
|
* Sets the register level programming class config register.
|
|
*
|
|
* @param pPciDev The PCI device.
|
|
* @param u8ClassProg The new value.
|
|
*/
|
|
DECLINLINE(void) PDMPciDevSetClassProg(PPDMPCIDEV pPciDev, uint8_t u8ClassProg)
|
|
{
|
|
PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_PROG, u8ClassProg);
|
|
}
|
|
|
|
|
|
/**
|
|
* Sets the sub-class (aka device class) config register.
|
|
*
|
|
* @param pPciDev The PCI device.
|
|
* @param u8SubClass The sub-class.
|
|
*/
|
|
DECLINLINE(void) PDMPciDevSetClassSub(PPDMPCIDEV pPciDev, uint8_t u8SubClass)
|
|
{
|
|
PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_SUB, u8SubClass);
|
|
}
|
|
|
|
|
|
/**
|
|
* Sets the base class config register.
|
|
*
|
|
* @param pPciDev The PCI device.
|
|
* @param u8BaseClass The base class.
|
|
*/
|
|
DECLINLINE(void) PDMPciDevSetClassBase(PPDMPCIDEV pPciDev, uint8_t u8BaseClass)
|
|
{
|
|
PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_BASE, u8BaseClass);
|
|
}
|
|
|
|
/**
|
|
* Sets the header type config register.
|
|
*
|
|
* @param pPciDev The PCI device.
|
|
* @param u8HdrType The header type.
|
|
*/
|
|
DECLINLINE(void) PDMPciDevSetHeaderType(PPDMPCIDEV pPciDev, uint8_t u8HdrType)
|
|
{
|
|
PDMPciDevSetByte(pPciDev, VBOX_PCI_HEADER_TYPE, u8HdrType);
|
|
}
|
|
|
|
/**
|
|
* Gets the header type config register.
|
|
*
|
|
* @param pPciDev The PCI device.
|
|
* @returns u8HdrType The header type.
|
|
*/
|
|
DECLINLINE(uint8_t) PDMPciDevGetHeaderType(PCPDMPCIDEV pPciDev)
|
|
{
|
|
return PDMPciDevGetByte(pPciDev, VBOX_PCI_HEADER_TYPE);
|
|
}
|
|
|
|
/**
|
|
* Sets the BIST (built-in self-test) config register.
|
|
*
|
|
* @param pPciDev The PCI device.
|
|
* @param u8Bist The BIST value.
|
|
*/
|
|
DECLINLINE(void) PDMPciDevSetBIST(PPDMPCIDEV pPciDev, uint8_t u8Bist)
|
|
{
|
|
PDMPciDevSetByte(pPciDev, VBOX_PCI_BIST, u8Bist);
|
|
}
|
|
|
|
/**
|
|
* Gets the BIST (built-in self-test) config register.
|
|
*
|
|
* @param pPciDev The PCI device.
|
|
* @returns u8Bist The BIST.
|
|
*/
|
|
DECLINLINE(uint8_t) PDMPciDevGetBIST(PCPDMPCIDEV pPciDev)
|
|
{
|
|
return PDMPciDevGetByte(pPciDev, VBOX_PCI_BIST);
|
|
}
|
|
|
|
|
|
/**
|
|
* Sets a base address config register.
|
|
*
|
|
* @param pPciDev The PCI device.
|
|
* @param iReg Base address register number (0..5).
|
|
* @param fIOSpace Whether it's I/O (true) or memory (false) space.
|
|
* @param fPrefetchable Whether the memory is prefetachable. Must be false if fIOSpace == true.
|
|
* @param f64Bit Whether the memory can be mapped anywhere in the 64-bit address space. Otherwise restrict to 32-bit.
|
|
* @param u32Addr The address value.
|
|
*/
|
|
DECLINLINE(void) PDMPciDevSetBaseAddress(PPDMPCIDEV pPciDev, uint8_t iReg, bool fIOSpace, bool fPrefetchable, bool f64Bit,
|
|
uint32_t u32Addr)
|
|
{
|
|
if (fIOSpace)
|
|
{
|
|
Assert(!(u32Addr & 0x3)); Assert(!fPrefetchable); Assert(!f64Bit);
|
|
u32Addr |= RT_BIT_32(0);
|
|
}
|
|
else
|
|
{
|
|
Assert(!(u32Addr & 0xf));
|
|
if (fPrefetchable)
|
|
u32Addr |= RT_BIT_32(3);
|
|
if (f64Bit)
|
|
u32Addr |= 0x2 << 1;
|
|
}
|
|
switch (iReg)
|
|
{
|
|
case 0: iReg = VBOX_PCI_BASE_ADDRESS_0; break;
|
|
case 1: iReg = VBOX_PCI_BASE_ADDRESS_1; break;
|
|
case 2: iReg = VBOX_PCI_BASE_ADDRESS_2; break;
|
|
case 3: iReg = VBOX_PCI_BASE_ADDRESS_3; break;
|
|
case 4: iReg = VBOX_PCI_BASE_ADDRESS_4; break;
|
|
case 5: iReg = VBOX_PCI_BASE_ADDRESS_5; break;
|
|
default: AssertFailedReturnVoid();
|
|
}
|
|
|
|
PDMPciDevSetDWord(pPciDev, iReg, u32Addr);
|
|
}
|
|
|
|
/**
|
|
* Please document me. I don't seem to be getting as much as calculating
|
|
* the address of some PCI region.
|
|
*/
|
|
DECLINLINE(uint32_t) PDMPciDevGetRegionReg(uint32_t iRegion)
|
|
{
|
|
return iRegion == VBOX_PCI_ROM_SLOT
|
|
? VBOX_PCI_ROM_ADDRESS : (VBOX_PCI_BASE_ADDRESS_0 + iRegion * 4);
|
|
}
|
|
|
|
/**
|
|
* Sets the sub-system vendor id config register.
|
|
*
|
|
* @param pPciDev The PCI device.
|
|
* @param u16SubSysVendorId The sub-system vendor id.
|
|
*/
|
|
DECLINLINE(void) PDMPciDevSetSubSystemVendorId(PPDMPCIDEV pPciDev, uint16_t u16SubSysVendorId)
|
|
{
|
|
PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID, u16SubSysVendorId);
|
|
}
|
|
|
|
/**
|
|
* Gets the sub-system vendor id config register.
|
|
* @returns the sub-system vendor id.
|
|
* @param pPciDev The PCI device.
|
|
*/
|
|
DECLINLINE(uint16_t) PDMPciDevGetSubSystemVendorId(PCPDMPCIDEV pPciDev)
|
|
{
|
|
return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID);
|
|
}
|
|
|
|
|
|
/**
|
|
* Sets the sub-system id config register.
|
|
*
|
|
* @param pPciDev The PCI device.
|
|
* @param u16SubSystemId The sub-system id.
|
|
*/
|
|
DECLINLINE(void) PDMPciDevSetSubSystemId(PPDMPCIDEV pPciDev, uint16_t u16SubSystemId)
|
|
{
|
|
PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID, u16SubSystemId);
|
|
}
|
|
|
|
/**
|
|
* Gets the sub-system id config register.
|
|
* @returns the sub-system id.
|
|
* @param pPciDev The PCI device.
|
|
*/
|
|
DECLINLINE(uint16_t) PDMPciDevGetSubSystemId(PCPDMPCIDEV pPciDev)
|
|
{
|
|
return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID);
|
|
}
|
|
|
|
/**
|
|
* Sets offset to capability list.
|
|
*
|
|
* @param pPciDev The PCI device.
|
|
* @param u8Offset The offset to capability list.
|
|
*/
|
|
DECLINLINE(void) PDMPciDevSetCapabilityList(PPDMPCIDEV pPciDev, uint8_t u8Offset)
|
|
{
|
|
PDMPciDevSetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST, u8Offset);
|
|
}
|
|
|
|
/**
|
|
* Returns offset to capability list.
|
|
*
|
|
* @returns offset to capability list.
|
|
* @param pPciDev The PCI device.
|
|
*/
|
|
DECLINLINE(uint8_t) PDMPciDevGetCapabilityList(PCPDMPCIDEV pPciDev)
|
|
{
|
|
return PDMPciDevGetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST);
|
|
}
|
|
|
|
/**
|
|
* Sets the interrupt line config register.
|
|
*
|
|
* @param pPciDev The PCI device.
|
|
* @param u8Line The interrupt line.
|
|
*/
|
|
DECLINLINE(void) PDMPciDevSetInterruptLine(PPDMPCIDEV pPciDev, uint8_t u8Line)
|
|
{
|
|
PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE, u8Line);
|
|
}
|
|
|
|
/**
|
|
* Gets the interrupt line config register.
|
|
*
|
|
* @returns The interrupt line.
|
|
* @param pPciDev The PCI device.
|
|
*/
|
|
DECLINLINE(uint8_t) PDMPciDevGetInterruptLine(PCPDMPCIDEV pPciDev)
|
|
{
|
|
return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE);
|
|
}
|
|
|
|
/**
|
|
* Sets the interrupt pin config register.
|
|
*
|
|
* @param pPciDev The PCI device.
|
|
* @param u8Pin The interrupt pin.
|
|
*/
|
|
DECLINLINE(void) PDMPciDevSetInterruptPin(PPDMPCIDEV pPciDev, uint8_t u8Pin)
|
|
{
|
|
PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN, u8Pin);
|
|
}
|
|
|
|
/**
|
|
* Gets the interrupt pin config register.
|
|
*
|
|
* @returns The interrupt pin.
|
|
* @param pPciDev The PCI device.
|
|
*/
|
|
DECLINLINE(uint8_t) PDMPciDevGetInterruptPin(PCPDMPCIDEV pPciDev)
|
|
{
|
|
return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN);
|
|
}
|
|
|
|
/** @} */
|
|
|
|
/** @name Aliases for old function names.
|
|
* @{
|
|
*/
|
|
#if !defined(PDMPCIDEVICE_NO_DEPRECATED) || defined(DOXYGEN_RUNNING)
|
|
# define PCIDevSetByte PDMPciDevSetByte
|
|
# define PCIDevGetByte PDMPciDevGetByte
|
|
# define PCIDevSetWord PDMPciDevSetWord
|
|
# define PCIDevGetWord PDMPciDevGetWord
|
|
# define PCIDevSetDWord PDMPciDevSetDWord
|
|
# define PCIDevGetDWord PDMPciDevGetDWord
|
|
# define PCIDevSetQWord PDMPciDevSetQWord
|
|
# define PCIDevGetQWord PDMPciDevGetQWord
|
|
# define PCIDevSetVendorId PDMPciDevSetVendorId
|
|
# define PCIDevGetVendorId PDMPciDevGetVendorId
|
|
# define PCIDevSetDeviceId PDMPciDevSetDeviceId
|
|
# define PCIDevGetDeviceId PDMPciDevGetDeviceId
|
|
# define PCIDevSetCommand PDMPciDevSetCommand
|
|
# define PCIDevGetCommand PDMPciDevGetCommand
|
|
# define PCIDevIsBusmaster PDMPciDevIsBusmaster
|
|
# define PCIDevIsIntxDisabled PDMPciDevIsIntxDisabled
|
|
# define PCIDevGetStatus PDMPciDevGetStatus
|
|
# define PCIDevSetStatus PDMPciDevSetStatus
|
|
# define PCIDevSetRevisionId PDMPciDevSetRevisionId
|
|
# define PCIDevSetClassProg PDMPciDevSetClassProg
|
|
# define PCIDevSetClassSub PDMPciDevSetClassSub
|
|
# define PCIDevSetClassBase PDMPciDevSetClassBase
|
|
# define PCIDevSetHeaderType PDMPciDevSetHeaderType
|
|
# define PCIDevGetHeaderType PDMPciDevGetHeaderType
|
|
# define PCIDevSetBIST PDMPciDevSetBIST
|
|
# define PCIDevGetBIST PDMPciDevGetBIST
|
|
# define PCIDevSetBaseAddress PDMPciDevSetBaseAddress
|
|
# define PCIDevGetRegionReg PDMPciDevGetRegionReg
|
|
# define PCIDevSetSubSystemVendorId PDMPciDevSetSubSystemVendorId
|
|
# define PCIDevGetSubSystemVendorId PDMPciDevGetSubSystemVendorId
|
|
# define PCIDevSetSubSystemId PDMPciDevSetSubSystemId
|
|
# define PCIDevGetSubSystemId PDMPciDevGetSubSystemId
|
|
# define PCIDevSetCapabilityList PDMPciDevSetCapabilityList
|
|
# define PCIDevGetCapabilityList PDMPciDevGetCapabilityList
|
|
# define PCIDevSetInterruptLine PDMPciDevSetInterruptLine
|
|
# define PCIDevGetInterruptLine PDMPciDevGetInterruptLine
|
|
# define PCIDevSetInterruptPin PDMPciDevSetInterruptPin
|
|
# define PCIDevGetInterruptPin PDMPciDevGetInterruptPin
|
|
#endif
|
|
/** @} */
|
|
|
|
|
|
/** @name PDMIICH9BRIDGEPDMPCIDEV_IID - Ugly 3rd party bridge/raw PCI hack.
|
|
*
|
|
* When querying this IID via IBase::pfnQueryInterface on a ICH9 bridge, you
|
|
* will get a pointer to a PDMPCIDEV rather pointer to an interface function
|
|
* table as is the custom. This was needed by some unusual 3rd-party raw and/or
|
|
* pass-through implementation which need to provide different PCI configuration
|
|
* space content for bridges (as long as we don't allow pass-through of bridges
|
|
* or custom bridge device implementations). So, HACK ALERT to all of this!
|
|
* @{ */
|
|
#define PDMIICH9BRIDGEPDMPCIDEV_IID "785c74b1-8510-4458-9422-56750bf221db"
|
|
typedef PPDMPCIDEV PPDMIICH9BRIDGEPDMPCIDEV;
|
|
typedef PDMPCIDEV PDMIICH9BRIDGEPDMPCIDEV;
|
|
/** @} */
|
|
|
|
|
|
/** @} */
|
|
|
|
#endif /* !VBOX_INCLUDED_vmm_pdmpcidev_h */
|