321 lines
7.3 KiB
C
321 lines
7.3 KiB
C
/** @file
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* IPRT - ARM Specific Assembly Functions.
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*/
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/*
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* Copyright (C) 2015-2023 Oracle and/or its affiliates.
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*
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* This file is part of VirtualBox base platform packages, as
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* available from https://www.virtualbox.org.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, in version 3 of the
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* License.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <https://www.gnu.org/licenses>.
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*
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* The contents of this file may alternatively be used under the terms
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* of the Common Development and Distribution License Version 1.0
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* (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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* in the VirtualBox distribution, in which case the provisions of the
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* CDDL are applicable instead of those of the GPL.
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*
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* You may elect to license modified versions of this file under the
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* terms and conditions of either the GPL or the CDDL or both.
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*
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* SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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*/
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#ifndef IPRT_INCLUDED_asm_arm_h
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#define IPRT_INCLUDED_asm_arm_h
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#ifndef RT_WITHOUT_PRAGMA_ONCE
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# pragma once
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#endif
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#include <iprt/types.h>
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#if !defined(RT_ARCH_ARM64) && !defined(RT_ARCH_ARM32)
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# error "Not on ARM64 or ARM32"
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#endif
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/** @defgroup grp_rt_asm_arm ARM Specific ASM Routines
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* @ingroup grp_rt_asm
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* @{
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*/
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#if 0 /* figure out arm64 */
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/**
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* Get the CPSR (Current Program Status) register.
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* @returns CPSR.
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*/
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#if RT_INLINE_ASM_EXTERNAL
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DECLASM(RTCCUINTREG) ASMGetFlags(void);
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#else
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DECLINLINE(RTCCUINTREG) ASMGetFlags(void)
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{
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RTCCUINTREG uFlags;
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# if RT_INLINE_ASM_GNU_STYLE
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# ifdef RT_ARCH_ARM64
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__asm__ __volatile__("mrs %0, nzcv\n\t" : "=r" (uFlags));
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# else
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__asm__ __volatile__("mrs %0, cpsr\n\t" : "=r" (uFlags));
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# endif
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# else
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# error "Unsupported compiler"
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# endif
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return uFlags;
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}
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#endif
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/**
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* Set the CPSR register.
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* @param uFlags The new CPSR value.
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*/
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#if RT_INLINE_ASM_EXTERNAL
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DECLASM(void) ASMSetFlags(RTCCUINTREG uFlags);
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#else
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DECLINLINE(void) ASMSetFlags(RTCCUINTREG uFlags)
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{
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# if RT_INLINE_ASM_GNU_STYLE
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__asm__ __volatile__("msr cpsr_c, %0\n\t"
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: : "r" (uFlags));
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# else
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# error "Unsupported compiler"
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# endif
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}
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#endif
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#endif
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/**
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* Gets the content of the CNTVCT_EL0 (or CNTPCT) register.
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*
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* @returns CNTVCT_EL0 value.
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* @note We call this TSC to better fit in with existing x86/amd64 based code.
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*/
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#if RT_INLINE_ASM_EXTERNAL
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DECLASM(uint64_t) ASMReadTSC(void);
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#else
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DECLINLINE(uint64_t) ASMReadTSC(void)
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{
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# if RT_INLINE_ASM_GNU_STYLE
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uint64_t u64;
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# ifdef RT_ARCH_ARM64
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__asm__ __volatile__("isb\n\t"
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"mrs %0, CNTVCT_EL0\n\t"
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: "=r" (u64));
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# else
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uint32_t u32Spill;
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uint32_t u32Comp;
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__asm__ __volatile__("isb\n"
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"Lagain:\n\t"
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"mrrc p15, 0, %[uSpill], %H[uRet], c14\n\t" /* CNTPCT high into uRet.hi */
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"mrrc p15, 0, %[uRet], %[uSpill], c14\n\t" /* CNTPCT low into uRet.lo */
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"mrrc p15, 0, %[uSpill], %[uHiComp], c14\n\t" /* CNTPCT high into uHiComp */
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"cmp %H[uRet], %[uHiComp]\n\t"
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"b.eq Lagain\n\t" /* Redo if high value changed. */
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: [uRet] "=r" (u64)
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, "=r" (uHiComp)
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, "=r" (uSpill));
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# endif
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return u64;
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# else
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# error "Unsupported compiler"
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# endif
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}
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#endif
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#if 0 /* port to arm64, armv7 and check */
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/**
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* Enables interrupts (IRQ and FIQ).
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*/
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#if RT_INLINE_ASM_EXTERNAL
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DECLASM(void) ASMIntEnable(void);
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#else
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DECLINLINE(void) ASMIntEnable(void)
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{
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RTCCUINTREG uFlags;
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# if RT_INLINE_ASM_GNU_STYLE
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__asm__ __volatile__("mrs %0, cpsr\n\t"
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"bic %0, %0, #0xc0\n\t"
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"msr cpsr_c, %0\n\t"
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: "=r" (uFlags));
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# else
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# error "Unsupported compiler"
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# endif
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}
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#endif
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/**
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* Disables interrupts (IRQ and FIQ).
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*/
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#if RT_INLINE_ASM_EXTERNAL
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DECLASM(void) ASMIntDisable(void);
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#else
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DECLINLINE(void) ASMIntDisable(void)
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{
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RTCCUINTREG uFlags;
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# if RT_INLINE_ASM_GNU_STYLE
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__asm__ __volatile__("mrs %0, cpsr\n\t"
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"orr %0, %0, #0xc0\n\t"
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"msr cpsr_c, %0\n\t"
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: "=r" (uFlags));
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# else
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# error "Unsupported compiler"
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# endif
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}
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#endif
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/**
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* Disables interrupts and returns previous uFLAGS.
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*/
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#if RT_INLINE_ASM_EXTERNAL
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DECLASM(RTCCUINTREG) ASMIntDisableFlags(void);
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#else
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DECLINLINE(RTCCUINTREG) ASMIntDisableFlags(void)
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{
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RTCCUINTREG uFlags;
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# if RT_INLINE_ASM_GNU_STYLE
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RTCCUINTREG uNewFlags;
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__asm__ __volatile__("mrs %0, cpsr\n\t"
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"orr %1, %0, #0xc0\n\t"
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"msr cpsr_c, %1\n\t"
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: "=r" (uFlags)
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, "=r" (uNewFlags));
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# else
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# error "Unsupported compiler"
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# endif
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return uFlags;
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}
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#endif
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/**
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* Are interrupts enabled?
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*
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* @returns true / false.
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*/
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DECLINLINE(bool) ASMIntAreEnabled(void)
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{
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/** @todo r=bird: reversed, but does both need to be enabled? */
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return ASMGetFlags() & 0xc0 /* IRQ and FIQ bits */ ? true : false;
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}
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#endif
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/**
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* Halts the CPU until interrupted.
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*/
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#if RT_INLINE_ASM_EXTERNAL
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DECLASM(void) ASMHalt(void);
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#else
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DECLINLINE(void) ASMHalt(void)
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{
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# if RT_INLINE_ASM_GNU_STYLE
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__asm__ __volatile__ ("wfi\n\t"); /* wait for interrupt */
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# else
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# error "Unsupported compiler"
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# endif
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}
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#endif
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#if 0
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/**
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* Gets the CPU ID of the current CPU.
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*
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* @returns the CPU ID.
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* @note the name of this method is a bit misleading but serves the purpose
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* and prevents #ifdef orgies in other places.
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*/
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#if RT_INLINE_ASM_EXTERNAL
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DECLASM(uint8_t) ASMGetApicId(void);
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#else
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DECLINLINE(uint8_t) ASMGetApicId(void)
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{
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# if RT_INLINE_ASM_GNU_STYLE
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RTCCUINTREG uCpuId;
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__asm__ ("mrc p15, 0, %0, c0, c0, 5\n\t" /* CPU ID Register, privileged */
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: "=r" (uCpuId));
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return uCpuId;
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# else
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# error "Unsupported compiler"
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# endif
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}
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#endif
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#endif
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#if 0
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/**
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* Invalidate page.
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*
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* @param pv Address of the page to invalidate.
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*/
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#if RT_INLINE_ASM_EXTERNAL
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DECLASM(void) ASMInvalidatePage(void *pv);
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#else
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DECLINLINE(void) ASMInvalidatePage(void *pv)
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{
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# if RT_INLINE_ASM_GNU_STYLE
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# else
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# error "Unsupported compiler"
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# endif
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}
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#endif
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/**
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* Write back the internal caches and invalidate them.
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*/
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#if RT_INLINE_ASM_EXTERNAL
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DECLASM(void) ASMWriteBackAndInvalidateCaches(void);
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#else
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DECLINLINE(void) ASMWriteBackAndInvalidateCaches(void)
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{
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# if RT_INLINE_ASM_GNU_STYLE
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# else
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# error "Unsupported compiler"
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# endif
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}
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#endif
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/**
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* Invalidate internal and (perhaps) external caches without first
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* flushing dirty cache lines. Use with extreme care.
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*/
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#if RT_INLINE_ASM_EXTERNAL
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DECLASM(void) ASMInvalidateInternalCaches(void);
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#else
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DECLINLINE(void) ASMInvalidateInternalCaches(void)
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{
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# if RT_INLINE_ASM_GNU_STYLE
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# else
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# error "Unsupported compiler"
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# endif
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}
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#endif
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#endif
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/** @} */
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#endif /* !IPRT_INCLUDED_asm_arm_h */
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