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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-05-06 01:02:30 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-05-06 01:02:30 +0000 |
commit | 76cb841cb886eef6b3bee341a2266c76578724ad (patch) | |
tree | f5892e5ba6cc11949952a6ce4ecbe6d516d6ce58 /arch/arm/boot/dts/imx31-lite.dts | |
parent | Initial commit. (diff) | |
download | linux-76cb841cb886eef6b3bee341a2266c76578724ad.tar.xz linux-76cb841cb886eef6b3bee341a2266c76578724ad.zip |
Adding upstream version 4.19.249.upstream/4.19.249
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'arch/arm/boot/dts/imx31-lite.dts')
-rw-r--r-- | arch/arm/boot/dts/imx31-lite.dts | 178 |
1 files changed, 178 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx31-lite.dts b/arch/arm/boot/dts/imx31-lite.dts new file mode 100644 index 000000000..d17abdfb6 --- /dev/null +++ b/arch/arm/boot/dts/imx31-lite.dts @@ -0,0 +1,178 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com> + +/dts-v1/; + +#include "imx31.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + model = "LogicPD i.MX31 Lite"; + compatible = "logicpd,imx31-lite", "fsl,imx31"; + + chosen { + stdout-path = &uart1; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x8000000>; + }; + + leds { + compatible = "gpio-leds"; + + led0 { + gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + }; + + led1 { + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&ata { + status = "okay"; +}; + +&nfc { + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + nand-on-flash-bbt; + status = "okay"; +}; + +&sdhci1 { + bus-width = <4>; + cd-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>; + wp-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&spi2 { + status = "okay"; + + pmic@0 { + compatible = "fsl,mc13783"; + reg = <0>; + spi-cs-high; + spi-max-frequency = <1000000>; + interrupt-parent = <&gpio1>; + interrupts = <3 IRQ_TYPE_EDGE_RISING>; + + fsl,mc13xxx-uses-adc; + fsl,mc13xxx-uses-rtc; + + regulators { + sw1a { /* QVCC */ + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + sw1b { /* QVCC */ + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + sw2a { /* 1.8V_DDR, NVCC2, NVCC21 and NVCC22 */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + sw2b { /* NVCC10 */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + violo { /* NVCC1 and NVCC7 */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + viohi { /* VIOHI */ + regulator-min-microvolt = <2775000>; + regulator-max-microvolt = <2775000>; + regulator-always-on; + regulator-boot-on; + }; + + vaudio { /* VAUDIO */ + regulator-min-microvolt = <2775000>; + regulator-max-microvolt = <2775000>; + }; + + vcam { /* NVCC4 */ + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + vgen { /* NVCC5 / NVCC8 and NVCC6 / NVCC9 */ + regulator-min-microvolt = <2775000>; + regulator-max-microvolt = <2775000>; + regulator-always-on; + regulator-boot-on; + }; + + vmmc2 { /* NVCC3 */ + regulator-min-microvolt = <1600000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; +}; + +&uart1 { + uart-has-rtscts; + status = "okay"; +}; + +/* Routed to the extension board */ +&uart2 { + uart-has-rtscts; + status = "okay"; +}; + +/* Routed to the extension board */ +&uart3 { + uart-has-rtscts; + status = "okay"; +}; + +&weim { + status = "okay"; + + nor@0,0 { + compatible = "cfi-flash"; + reg = <0 0x0 0x200000>; + bank-width = <2>; + linux,mtd-name = "physmap-flash.0"; + fsl,weim-cs-timing = <0x0000cf03 0xa0330d01 0x00220800>; + }; + + ethernet@4,0 { + compatible = "smsc,lan9117", "smsc,lan9115"; + reg = <4 0x0 0x100>; + interrupt-parent = <&gpio1>; + interrupts = <26 IRQ_TYPE_EDGE_FALLING>; + phy-mode = "mii"; + reg-io-width = <2>; + smsc,irq-push-pull; + fsl,weim-cs-timing = <0x00008701 0x04000541 0x00010000>; + }; +}; |