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| author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-05-06 01:02:30 +0000 |
|---|---|---|
| committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-05-06 01:02:30 +0000 |
| commit | 76cb841cb886eef6b3bee341a2266c76578724ad (patch) | |
| tree | f5892e5ba6cc11949952a6ce4ecbe6d516d6ce58 /arch/sh/include/cpu-sh4/cpu/watchdog.h | |
| parent | Initial commit. (diff) | |
| download | linux-76cb841cb886eef6b3bee341a2266c76578724ad.tar.xz linux-76cb841cb886eef6b3bee341a2266c76578724ad.zip | |
Adding upstream version 4.19.249.upstream/4.19.249
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to '')
| -rw-r--r-- | arch/sh/include/cpu-sh4/cpu/watchdog.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/sh/include/cpu-sh4/cpu/watchdog.h b/arch/sh/include/cpu-sh4/cpu/watchdog.h new file mode 100644 index 000000000..7f62b9380 --- /dev/null +++ b/arch/sh/include/cpu-sh4/cpu/watchdog.h @@ -0,0 +1,44 @@ +/* + * include/asm-sh/cpu-sh4/watchdog.h + * + * Copyright (C) 2002, 2003 Paul Mundt + * Copyright (C) 2009 Siemens AG + * Copyright (C) 2009 Sitdikov Valentin + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_CPU_SH4_WATCHDOG_H +#define __ASM_CPU_SH4_WATCHDOG_H + +#if defined(CONFIG_CPU_SUBTYPE_SH7785) || defined(CONFIG_CPU_SUBTYPE_SH7780) +/* Prefix definition */ +#define WTBST_HIGH 0x55 +/* Register definitions */ +#define WTCNT_R 0xffcc0010 /*WDTCNT*/ +#define WTCSR 0xffcc0004 /*WDTCSR*/ +#define WTCNT 0xffcc0000 /*WDTST*/ +#define WTST WTCNT +#define WTBST 0xffcc0008 /*WDTBST*/ +/* Register definitions */ +#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || \ + defined(CONFIG_CPU_SUBTYPE_SH7723) || \ + defined(CONFIG_CPU_SUBTYPE_SH7724) +#define WTCNT 0xa4520000 +#define WTCSR 0xa4520004 +#else +/* Register definitions */ +#define WTCNT 0xffc00008 +#define WTCSR 0xffc0000c +#endif + +/* Bit definitions */ +#define WTCSR_TME 0x80 +#define WTCSR_WT 0x40 +#define WTCSR_RSTS 0x20 +#define WTCSR_WOVF 0x10 +#define WTCSR_IOVF 0x08 + +#endif /* __ASM_CPU_SH4_WATCHDOG_H */ + |