diff options
Diffstat (limited to 'arch/arm/plat-orion/include')
| -rw-r--r-- | arch/arm/plat-orion/include/plat/addr-map.h | 54 | ||||
| -rw-r--r-- | arch/arm/plat-orion/include/plat/common.h | 107 | ||||
| -rw-r--r-- | arch/arm/plat-orion/include/plat/irq.h | 15 | ||||
| -rw-r--r-- | arch/arm/plat-orion/include/plat/mpp.h | 34 | ||||
| -rw-r--r-- | arch/arm/plat-orion/include/plat/orion-gpio.h | 39 | ||||
| -rw-r--r-- | arch/arm/plat-orion/include/plat/pcie.h | 34 | ||||
| -rw-r--r-- | arch/arm/plat-orion/include/plat/time.h | 20 |
7 files changed, 303 insertions, 0 deletions
diff --git a/arch/arm/plat-orion/include/plat/addr-map.h b/arch/arm/plat-orion/include/plat/addr-map.h new file mode 100644 index 000000000..b76c06569 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/addr-map.h @@ -0,0 +1,54 @@ +/* + * arch/arm/plat-orion/include/plat/addr-map.h + * + * Marvell Orion SoC address map handling. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_ADDR_MAP_H +#define __PLAT_ADDR_MAP_H + +extern struct mbus_dram_target_info orion_mbus_dram_info; + +struct orion_addr_map_cfg { + const int num_wins; /* Total number of windows */ + const int remappable_wins; + void __iomem *bridge_virt_base; + int hw_io_coherency; + + /* If NULL, the default cpu_win_can_remap will be used, using + the value in remappable_wins */ + int (*cpu_win_can_remap) (const struct orion_addr_map_cfg *cfg, + const int win); + /* If NULL, the default win_cfg_base will be used, using the + value in bridge_virt_base */ + void __iomem *(*win_cfg_base) (const struct orion_addr_map_cfg *cfg, + const int win); +}; + +/* + * Information needed to setup one address mapping. + */ +struct orion_addr_map_info { + const int win; + const u32 base; + const u32 size; + const u8 target; + const u8 attr; + const int remap; +}; + +void __init orion_config_wins(struct orion_addr_map_cfg *cfg, + const struct orion_addr_map_info *info); + +void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg, + const int win, const u32 base, + const u32 size, const u8 target, + const u8 attr, const int remap); + +void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg, + const void __iomem *ddr_window_cpu_base); +#endif diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h new file mode 100644 index 000000000..3647d3b33 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/common.h @@ -0,0 +1,107 @@ +/* + * arch/arm/plat-orion/include/plat/common.h + * + * Marvell Orion SoC common setup code used by different mach-/common.c + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_COMMON_H +#include <linux/mv643xx_eth.h> +#include <linux/platform_data/usb-ehci-orion.h> + +struct dsa_chip_data; +struct mv_sata_platform_data; + +void __init orion_uart0_init(void __iomem *membase, + resource_size_t mapbase, + unsigned int irq, + struct clk *clk); + +void __init orion_uart1_init(void __iomem *membase, + resource_size_t mapbase, + unsigned int irq, + struct clk *clk); + +void __init orion_uart2_init(void __iomem *membase, + resource_size_t mapbase, + unsigned int irq, + struct clk *clk); + +void __init orion_uart3_init(void __iomem *membase, + resource_size_t mapbase, + unsigned int irq, + struct clk *clk); + +void __init orion_rtc_init(unsigned long mapbase, + unsigned long irq); + +void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, + unsigned long mapbase, + unsigned long irq, + unsigned long irq_err, + unsigned int tx_csum_limit); + +void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, + unsigned long mapbase, + unsigned long irq, + unsigned int tx_csum_limit); + +void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, + unsigned long mapbase, + unsigned long irq); + +void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, + unsigned long mapbase, + unsigned long irq); + +void __init orion_ge00_switch_init(struct dsa_chip_data *d); + +void __init orion_i2c_init(unsigned long mapbase, + unsigned long irq, + unsigned long freq_m); + +void __init orion_i2c_1_init(unsigned long mapbase, + unsigned long irq, + unsigned long freq_m); + +void __init orion_spi_init(unsigned long mapbase); + +void __init orion_spi_1_init(unsigned long mapbase); + +void __init orion_xor0_init(unsigned long mapbase_low, + unsigned long mapbase_high, + unsigned long irq_0, + unsigned long irq_1); + +void __init orion_xor1_init(unsigned long mapbase_low, + unsigned long mapbase_high, + unsigned long irq_0, + unsigned long irq_1); + +void __init orion_ehci_init(unsigned long mapbase, + unsigned long irq, + enum orion_ehci_phy_ver phy_version); + +void __init orion_ehci_1_init(unsigned long mapbase, + unsigned long irq); + +void __init orion_ehci_2_init(unsigned long mapbase, + unsigned long irq); + +void __init orion_sata_init(struct mv_sata_platform_data *sata_data, + unsigned long mapbase, + unsigned long irq); + +void __init orion_crypto_init(unsigned long mapbase, + unsigned long srambase, + unsigned long sram_size, + unsigned long irq); + +void __init orion_clkdev_add(const char *con_id, const char *dev_id, + struct clk *clk); + +void __init orion_clkdev_init(struct clk *tclk); +#endif diff --git a/arch/arm/plat-orion/include/plat/irq.h b/arch/arm/plat-orion/include/plat/irq.h new file mode 100644 index 000000000..96be19e9b --- /dev/null +++ b/arch/arm/plat-orion/include/plat/irq.h @@ -0,0 +1,15 @@ +/* + * arch/arm/plat-orion/include/plat/irq.h + * + * Marvell Orion SoC IRQ handling. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_IRQ_H +#define __PLAT_IRQ_H + +void orion_irq_init(unsigned int irq_start, void __iomem *maskaddr); +#endif diff --git a/arch/arm/plat-orion/include/plat/mpp.h b/arch/arm/plat-orion/include/plat/mpp.h new file mode 100644 index 000000000..254552fee --- /dev/null +++ b/arch/arm/plat-orion/include/plat/mpp.h @@ -0,0 +1,34 @@ +/* + * arch/arm/plat-orion/include/plat/mpp.h + * + * Marvell Orion SoC MPP handling. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_MPP_H +#define __PLAT_MPP_H + +#define MPP_NUM(x) ((x) & 0xff) +#define MPP_SEL(x) (((x) >> 8) & 0xf) + +/* This is the generic MPP macro, without any variant information. + Each machine architecture is expected to extend this with further + bit fields indicating which MPP configurations are valid for a + specific variant. */ + +#define GENERIC_MPP(_num, _sel, _in, _out) ( \ + /* MPP number */ ((_num) & 0xff) | \ + /* MPP select value */ (((_sel) & 0xf) << 8) | \ + /* may be input signal */ ((!!(_in)) << 12) | \ + /* may be output signal */ ((!!(_out)) << 13)) + +#define MPP_INPUT_MASK GENERIC_MPP(0, 0x0, 1, 0) +#define MPP_OUTPUT_MASK GENERIC_MPP(0, 0x0, 0, 1) + +void __init orion_mpp_conf(unsigned int *mpp_list, unsigned int variant_mask, + unsigned int mpp_max, void __iomem *dev_bus); + +#endif diff --git a/arch/arm/plat-orion/include/plat/orion-gpio.h b/arch/arm/plat-orion/include/plat/orion-gpio.h new file mode 100644 index 000000000..e856b073a --- /dev/null +++ b/arch/arm/plat-orion/include/plat/orion-gpio.h @@ -0,0 +1,39 @@ +/* + * arch/arm/plat-orion/include/plat/orion-gpio.h + * + * Marvell Orion SoC GPIO handling. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_GPIO_H +#define __PLAT_GPIO_H + +#include <linux/init.h> +#include <linux/types.h> +#include <linux/irqdomain.h> + +struct gpio_desc; + +/* + * Orion-specific GPIO API extensions. + */ +void orion_gpio_set_unused(unsigned pin); +void orion_gpio_set_blink(unsigned pin, int blink); +int orion_gpio_led_blink_set(struct gpio_desc *desc, int state, + unsigned long *delay_on, unsigned long *delay_off); + +#define GPIO_INPUT_OK (1 << 0) +#define GPIO_OUTPUT_OK (1 << 1) +void orion_gpio_set_valid(unsigned pin, int mode); + +/* Initialize gpiolib. */ +void __init orion_gpio_init(struct device_node *np, + int gpio_base, int ngpio, + void __iomem *base, int mask_offset, + int secondary_irq_base, + int irq[4]); + +#endif diff --git a/arch/arm/plat-orion/include/plat/pcie.h b/arch/arm/plat-orion/include/plat/pcie.h new file mode 100644 index 000000000..fe5b9e862 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/pcie.h @@ -0,0 +1,34 @@ +/* + * arch/arm/plat-orion/include/plat/pcie.h + * + * Marvell Orion SoC PCIe handling. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_PCIE_H +#define __PLAT_PCIE_H + +struct pci_bus; + +u32 orion_pcie_dev_id(void __iomem *base); +u32 orion_pcie_rev(void __iomem *base); +int orion_pcie_link_up(void __iomem *base); +int orion_pcie_x4_mode(void __iomem *base); +int orion_pcie_get_local_bus_nr(void __iomem *base); +void orion_pcie_set_local_bus_nr(void __iomem *base, int nr); +void orion_pcie_reset(void __iomem *base); +void orion_pcie_setup(void __iomem *base); +int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val); +int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val); +int orion_pcie_rd_conf_wa(void __iomem *wa_base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val); +int orion_pcie_wr_conf(void __iomem *base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 val); + + +#endif diff --git a/arch/arm/plat-orion/include/plat/time.h b/arch/arm/plat-orion/include/plat/time.h new file mode 100644 index 000000000..07527e417 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/time.h @@ -0,0 +1,20 @@ +/* + * arch/arm/plat-orion/include/plat/time.h + * + * Marvell Orion SoC time handling. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_TIME_H +#define __PLAT_TIME_H + +void orion_time_set_base(void __iomem *timer_base); + +void orion_time_init(void __iomem *bridge_base, u32 bridge_timer1_clr_mask, + unsigned int irq, unsigned int tclk); + + +#endif |