/* * Broadcom BCM470X / BCM5301X ARM platform code. * Generic DTS part for all BCM53010, BCM53011, BCM53012, BCM53014, BCM53015, * BCM53016, BCM53017, BCM53018, BCM4707, BCM4708 and BCM4709 SoCs * * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de> * * Licensed under the GNU/GPL. See COPYING for details. */ #include <dt-bindings/clock/bcm-nsp.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include "skeleton.dtsi" / { interrupt-parent = <&gic>; chipcommonA { compatible = "simple-bus"; ranges = <0x00000000 0x18000000 0x00001000>; #address-cells = <1>; #size-cells = <1>; uart0: serial@300 { compatible = "ns16550"; reg = <0x0300 0x100>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; clocks = <&iprocslow>; status = "disabled"; }; uart1: serial@400 { compatible = "ns16550"; reg = <0x0400 0x100>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; clocks = <&iprocslow>; status = "disabled"; }; }; mpcore { compatible = "simple-bus"; ranges = <0x00000000 0x19000000 0x00023000>; #address-cells = <1>; #size-cells = <1>; a9pll: arm_clk@0 { #clock-cells = <0>; compatible = "brcm,nsp-armpll"; clocks = <&osc>; reg = <0x00000 0x1000>; }; scu@20000 { compatible = "arm,cortex-a9-scu"; reg = <0x20000 0x100>; }; timer@20200 { compatible = "arm,cortex-a9-global-timer"; reg = <0x20200 0x100>; interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>; clocks = <&periph_clk>; }; timer@20600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0x20600 0x20>; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>; clocks = <&periph_clk>; }; watchdog@20620 { compatible = "arm,cortex-a9-twd-wdt"; reg = <0x20620 0x20>; interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>; clocks = <&periph_clk>; }; gic: interrupt-controller@21000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; reg = <0x21000 0x1000>, <0x20100 0x100>; }; L2: cache-controller@22000 { compatible = "arm,pl310-cache"; reg = <0x22000 0x1000>; cache-unified; arm,shared-override; prefetch-data = <1>; prefetch-instr = <1>; cache-level = <2>; }; }; pmu { compatible = "arm,cortex-a9-pmu"; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; }; clocks { #address-cells = <1>; #size-cells = <1>; ranges; osc: oscillator { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <25000000>; }; iprocmed: iprocmed { #clock-cells = <0>; compatible = "fixed-factor-clock"; clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>; clock-div = <2>; clock-mult = <1>; }; iprocslow: iprocslow { #clock-cells = <0>; compatible = "fixed-factor-clock"; clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>; clock-div = <4>; clock-mult = <1>; }; periph_clk: periph_clk { #clock-cells = <0>; compatible = "fixed-factor-clock"; clocks = <&a9pll>; clock-div = <2>; clock-mult = <1>; }; }; usb2_phy: usb2-phy { compatible = "brcm,ns-usb2-phy"; reg = <0x1800c000 0x1000>; reg-names = "dmu"; #phy-cells = <0>; clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>; clock-names = "phy-ref-clk"; }; axi@18000000 { compatible = "brcm,bus-axi"; reg = <0x18000000 0x1000>; ranges = <0x00000000 0x18000000 0x00100000>; #address-cells = <1>; #size-cells = <1>; #interrupt-cells = <1>; interrupt-map-mask = <0x000fffff 0xffff>; interrupt-map = /* ChipCommon */ <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, /* Switch Register Access Block */ <0x00007000 0 &gic GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, <0x00007000 1 &gic GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, <0x00007000 2 &gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, <0x00007000 3 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, <0x00007000 4 &gic GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, <0x00007000 5 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, <0x00007000 6 &gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, <0x00007000 7 &gic GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, <0x00007000 8 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, <0x00007000 9 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, <0x00007000 10 &gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, <0x00007000 11 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, <0x00007000 12 &gic GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, /* PCIe Controller 0 */ <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>, <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, <0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, <0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, <0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, /* PCIe Controller 1 */ <0x00013000 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, <0x00013000 1 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, <0x00013000 2 &gic GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, <0x00013000 3 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, <0x00013000 4 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, <0x00013000 5 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, /* PCIe Controller 2 */ <0x00014000 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, <0x00014000 1 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, <0x00014000 2 &gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, <0x00014000 3 &gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, <0x00014000 4 &gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, <0x00014000 5 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, /* USB 2.0 Controller */ <0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>, /* USB 3.0 Controller */ <0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, /* Ethernet Controller 0 */ <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, /* Ethernet Controller 1 */ <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, /* Ethernet Controller 2 */ <0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, /* Ethernet Controller 3 */ <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, /* NAND Controller */ <0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, <0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, <0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, <0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, <0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, <0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; chipcommon: chipcommon@0 { reg = <0x00000000 0x1000>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; pcie0: pcie@12000 { reg = <0x00012000 0x1000>; }; pcie1: pcie@13000 { reg = <0x00013000 0x1000>; }; usb2: usb2@21000 { reg = <0x00021000 0x1000>; #address-cells = <1>; #size-cells = <1>; ranges; interrupt-parent = <&gic>; ehci: usb@21000 { #usb-cells = <0>; compatible = "generic-ehci"; reg = <0x00021000 0x1000>; interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; phys = <&usb2_phy>; #address-cells = <1>; #size-cells = <0>; ehci_port1: port@1 { reg = <1>; #trigger-source-cells = <0>; }; ehci_port2: port@2 { reg = <2>; #trigger-source-cells = <0>; }; }; ohci: usb@22000 { #usb-cells = <0>; compatible = "generic-ohci"; reg = <0x00022000 0x1000>; interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ohci_port1: port@1 { reg = <1>; #trigger-source-cells = <0>; }; ohci_port2: port@2 { reg = <2>; #trigger-source-cells = <0>; }; }; }; usb3: usb3@23000 { reg = <0x00023000 0x1000>; #address-cells = <1>; #size-cells = <1>; ranges; interrupt-parent = <&gic>; xhci: xhci@23000 { #usb-cells = <0>; compatible = "generic-xhci"; reg = <0x00023000 0x1000>; interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; phys = <&usb3_phy>; phy-names = "usb"; #address-cells = <1>; #size-cells = <0>; xhci_port1: port@1 { reg = <1>; #trigger-source-cells = <0>; }; }; }; gmac0: ethernet@24000 { reg = <0x24000 0x800>; }; gmac1: ethernet@25000 { reg = <0x25000 0x800>; }; gmac2: ethernet@26000 { reg = <0x26000 0x800>; }; gmac3: ethernet@27000 { reg = <0x27000 0x800>; }; }; mdio: mdio@18003000 { compatible = "brcm,iproc-mdio"; reg = <0x18003000 0x8>; #size-cells = <0>; #address-cells = <1>; }; mdio-bus-mux { compatible = "mdio-mux-mmioreg"; mdio-parent-bus = <&mdio>; #address-cells = <1>; #size-cells = <0>; reg = <0x18003000 0x4>; mux-mask = <0x200>; mdio@0 { reg = <0x0>; #address-cells = <1>; #size-cells = <0>; usb3_phy: usb3-phy@10 { compatible = "brcm,ns-ax-usb3-phy"; reg = <0x10>; usb3-dmp-syscon = <&usb3_dmp>; #phy-cells = <0>; status = "disabled"; }; }; }; usb3_dmp: syscon@18105000 { reg = <0x18105000 0x1000>; }; i2c0: i2c@18009000 { compatible = "brcm,iproc-i2c"; reg = <0x18009000 0x50>; interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clock-frequency = <100000>; status = "disabled"; }; lcpll0: lcpll0@1800c100 { #clock-cells = <1>; compatible = "brcm,nsp-lcpll0"; reg = <0x1800c100 0x14>; clocks = <&osc>; clock-output-names = "lcpll0", "pcie_phy", "sdio", "ddr_phy"; }; genpll: genpll@1800c140 { #clock-cells = <1>; compatible = "brcm,nsp-genpll"; reg = <0x1800c140 0x24>; clocks = <&osc>; clock-output-names = "genpll", "phy", "ethernetclk", "usbclk", "iprocfast", "sata1", "sata2"; }; thermal: thermal@1800c2c0 { compatible = "brcm,ns-thermal"; reg = <0x1800c2c0 0x10>; #thermal-sensor-cells = <0>; }; srab: srab@18007000 { compatible = "brcm,bcm5301x-srab"; reg = <0x18007000 0x1000>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; /* ports are defined in board DTS */ }; rng: rng@18004000 { compatible = "brcm,bcm5301x-rng"; reg = <0x18004000 0x14>; }; nand: nand@18028000 { compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand"; reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>; reg-names = "nand", "iproc-idm", "iproc-ext"; interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; brcm,nand-has-wp; }; spi@18029200 { compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi"; reg = <0x18029200 0x184>, <0x18029000 0x124>, <0x1811b408 0x004>, <0x180293a0 0x01c>; reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg"; interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "mspi_done", "mspi_halted", "spi_lr_fullness_reached", "spi_lr_session_aborted", "spi_lr_impatient", "spi_lr_session_done", "spi_lr_overread"; clocks = <&iprocmed>; num-cs = <2>; #address-cells = <1>; #size-cells = <0>; spi_nor: flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <20000000>; linux,part-probe = "ofpart", "bcm47xxpart"; status = "disabled"; }; }; thermal-zones { cpu_thermal: cpu-thermal { polling-delay-passive = <0>; polling-delay = <1000>; coefficients = <(-556) 418000>; thermal-sensors = <&thermal>; trips { cpu-crit { temperature = <125000>; hysteresis = <0>; type = "critical"; }; }; cooling-maps { }; }; }; };