blob: 4ce9d6ca0bf7852943b7130e294dab833b08cb57 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
|
/*
* Copyright (c) 2017 MediaTek Inc.
* Author: YT Shen <yt.shen@mediatek.com>
*
* SPDX-License-Identifier: (GPL-2.0 OR MIT)
*/
/dts-v1/;
#include "mt2712e.dtsi"
/ {
model = "MediaTek MT2712 evaluation board";
compatible = "mediatek,mt2712-evb", "mediatek,mt2712";
aliases {
serial0 = &uart0;
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x80000000>;
};
chosen {
stdout-path = "serial0:921600n8";
};
cpus_fixed_vproc0: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "vproc_buck0";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
cpus_fixed_vproc1: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "vproc_buck1";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
};
&auxadc {
status = "okay";
};
&cpu0 {
proc-supply = <&cpus_fixed_vproc0>;
};
&cpu1 {
proc-supply = <&cpus_fixed_vproc0>;
};
&cpu2 {
proc-supply = <&cpus_fixed_vproc1>;
};
&uart0 {
status = "okay";
};
|