summaryrefslogtreecommitdiffstats
path: root/tests/expected/lscpu/lscpu-ppc64-POWER7
diff options
context:
space:
mode:
authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-05-06 02:42:50 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-05-06 02:42:50 +0000
commit8cb83eee5a58b1fad74c34094ce3afb9e430b5a4 (patch)
treea9b2e7baeca1be40eb734371e3c8b11b02294497 /tests/expected/lscpu/lscpu-ppc64-POWER7
parentInitial commit. (diff)
downloadutil-linux-8cb83eee5a58b1fad74c34094ce3afb9e430b5a4.tar.xz
util-linux-8cb83eee5a58b1fad74c34094ce3afb9e430b5a4.zip
Adding upstream version 2.33.1.upstream/2.33.1upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to '')
-rw-r--r--tests/expected/lscpu/lscpu-ppc64-POWER753
-rw-r--r--tests/expected/lscpu/lscpu-ppc64-POWER7-64cpu152
2 files changed, 205 insertions, 0 deletions
diff --git a/tests/expected/lscpu/lscpu-ppc64-POWER7 b/tests/expected/lscpu/lscpu-ppc64-POWER7
new file mode 100644
index 0000000..8c4dca0
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-ppc64-POWER7
@@ -0,0 +1,53 @@
+CPU(s): 16
+On-line CPU(s) list: 0-15
+Thread(s) per core: 4
+Core(s) per socket: 1
+Socket(s): 4
+NUMA node(s): 1
+Model: 2.1 (pvr 003f 0201)
+Model name: POWER7 (architected), altivec supported
+L1d cache: 32K
+L1i cache: 32K
+NUMA node0 CPU(s): 0-15
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i
+0,0,0,0,,0,0
+1,0,0,0,,0,0
+2,0,0,0,,0,0
+3,0,0,0,,0,0
+4,1,1,0,,1,1
+5,1,1,0,,1,1
+6,1,1,0,,1,1
+7,1,1,0,,1,1
+8,2,2,0,,2,2
+9,2,2,0,,2,2
+10,2,2,0,,2,2
+11,2,2,0,,2,2
+12,3,3,0,,3,3
+13,3,3,0,,3,3
+14,3,3,0,,3,3
+15,3,3,0,,3,3
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i
+0,0,-,0,,0,0
+1,0,-,0,,0,0
+2,0,-,0,,0,0
+3,0,-,0,,0,0
+4,4,-,0,,1,1
+5,4,-,0,,1,1
+6,4,-,0,,1,1
+7,4,-,0,,1,1
+8,8,-,0,,2,2
+9,8,-,0,,2,2
+10,8,-,0,,2,2
+11,8,-,0,,2,2
+12,12,-,0,,3,3
+13,12,-,0,,3,3
+14,12,-,0,,3,3
+15,12,-,0,,3,3
diff --git a/tests/expected/lscpu/lscpu-ppc64-POWER7-64cpu b/tests/expected/lscpu/lscpu-ppc64-POWER7-64cpu
new file mode 100644
index 0000000..2157b17
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-ppc64-POWER7-64cpu
@@ -0,0 +1,152 @@
+CPU(s): 64
+On-line CPU(s) list: 0-63
+Thread(s) per core: 4
+Core(s) per socket: 1
+Socket(s): 16
+NUMA node(s): 2
+Model: 2.1 (pvr 003f 0201)
+Model name: POWER7 (architected), altivec supported
+Hypervisor vendor: pHyp
+Virtualization type: para
+L1d cache: 32K
+L1i cache: 32K
+NUMA node0 CPU(s): 0-63
+NUMA node1 CPU(s):
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i
+0,0,0,0,,0,0
+1,0,0,0,,0,0
+2,0,0,0,,0,0
+3,0,0,0,,0,0
+4,1,1,0,,1,1
+5,1,1,0,,1,1
+6,1,1,0,,1,1
+7,1,1,0,,1,1
+8,2,2,0,,2,2
+9,2,2,0,,2,2
+10,2,2,0,,2,2
+11,2,2,0,,2,2
+12,3,3,0,,3,3
+13,3,3,0,,3,3
+14,3,3,0,,3,3
+15,3,3,0,,3,3
+16,4,4,0,,4,4
+17,4,4,0,,4,4
+18,4,4,0,,4,4
+19,4,4,0,,4,4
+20,5,5,0,,5,5
+21,5,5,0,,5,5
+22,5,5,0,,5,5
+23,5,5,0,,5,5
+24,6,6,0,,6,6
+25,6,6,0,,6,6
+26,6,6,0,,6,6
+27,6,6,0,,6,6
+28,7,7,0,,7,7
+29,7,7,0,,7,7
+30,7,7,0,,7,7
+31,7,7,0,,7,7
+32,8,8,0,,8,8
+33,8,8,0,,8,8
+34,8,8,0,,8,8
+35,8,8,0,,8,8
+36,9,9,0,,9,9
+37,9,9,0,,9,9
+38,9,9,0,,9,9
+39,9,9,0,,9,9
+40,10,10,0,,10,10
+41,10,10,0,,10,10
+42,10,10,0,,10,10
+43,10,10,0,,10,10
+44,11,11,0,,11,11
+45,11,11,0,,11,11
+46,11,11,0,,11,11
+47,11,11,0,,11,11
+48,12,12,0,,12,12
+49,12,12,0,,12,12
+50,12,12,0,,12,12
+51,12,12,0,,12,12
+52,13,13,0,,13,13
+53,13,13,0,,13,13
+54,13,13,0,,13,13
+55,13,13,0,,13,13
+56,14,14,0,,14,14
+57,14,14,0,,14,14
+58,14,14,0,,14,14
+59,14,14,0,,14,14
+60,15,15,0,,15,15
+61,15,15,0,,15,15
+62,15,15,0,,15,15
+63,15,15,0,,15,15
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i
+0,0,-,0,,0,0
+1,0,-,0,,0,0
+2,0,-,0,,0,0
+3,0,-,0,,0,0
+4,4,-,0,,1,1
+5,4,-,0,,1,1
+6,4,-,0,,1,1
+7,4,-,0,,1,1
+8,8,-,0,,2,2
+9,8,-,0,,2,2
+10,8,-,0,,2,2
+11,8,-,0,,2,2
+12,12,-,0,,3,3
+13,12,-,0,,3,3
+14,12,-,0,,3,3
+15,12,-,0,,3,3
+16,16,-,0,,4,4
+17,16,-,0,,4,4
+18,16,-,0,,4,4
+19,16,-,0,,4,4
+20,20,-,0,,5,5
+21,20,-,0,,5,5
+22,20,-,0,,5,5
+23,20,-,0,,5,5
+24,24,-,0,,6,6
+25,24,-,0,,6,6
+26,24,-,0,,6,6
+27,24,-,0,,6,6
+28,28,-,0,,7,7
+29,28,-,0,,7,7
+30,28,-,0,,7,7
+31,28,-,0,,7,7
+32,32,-,0,,8,8
+33,32,-,0,,8,8
+34,32,-,0,,8,8
+35,32,-,0,,8,8
+36,36,-,0,,9,9
+37,36,-,0,,9,9
+38,36,-,0,,9,9
+39,36,-,0,,9,9
+40,40,-,0,,10,10
+41,40,-,0,,10,10
+42,40,-,0,,10,10
+43,40,-,0,,10,10
+44,44,-,0,,11,11
+45,44,-,0,,11,11
+46,44,-,0,,11,11
+47,44,-,0,,11,11
+48,48,-,0,,12,12
+49,48,-,0,,12,12
+50,48,-,0,,12,12
+51,48,-,0,,12,12
+52,52,-,0,,13,13
+53,52,-,0,,13,13
+54,52,-,0,,13,13
+55,52,-,0,,13,13
+56,56,-,0,,14,14
+57,56,-,0,,14,14
+58,56,-,0,,14,14
+59,56,-,0,,14,14
+60,60,-,0,,15,15
+61,60,-,0,,15,15
+62,60,-,0,,15,15
+63,60,-,0,,15,15