From 76cb841cb886eef6b3bee341a2266c76578724ad Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Mon, 6 May 2024 03:02:30 +0200 Subject: Adding upstream version 4.19.249. Signed-off-by: Daniel Baumann --- .../devicetree/bindings/net/can/fsl-flexcan.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/can/fsl-flexcan.txt (limited to 'Documentation/devicetree/bindings/net/can/fsl-flexcan.txt') diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt new file mode 100644 index 000000000..bfc0c4336 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt @@ -0,0 +1,35 @@ +Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC). + +Required properties: + +- compatible : Should be "fsl,-flexcan" + + An implementation should also claim any of the following compatibles + that it is fully backwards compatible with: + + - fsl,p1010-flexcan + +- reg : Offset and length of the register set for this device +- interrupts : Interrupt tuple for this device + +Optional properties: + +- clock-frequency : The oscillator frequency driving the flexcan device + +- xceiver-supply: Regulator that powers the CAN transceiver + +- big-endian: This means the registers of FlexCAN controller are big endian. + This is optional property.i.e. if this property is not present in + device tree node then controller is assumed to be little endian. + if this property is present then controller is assumed to be big + endian. + +Example: + + can@1c000 { + compatible = "fsl,p1010-flexcan"; + reg = <0x1c000 0x1000>; + interrupts = <48 0x2>; + interrupt-parent = <&mpic>; + clock-frequency = <200000000>; // filled in by bootloader + }; -- cgit v1.2.3