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| author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-05-06 03:01:46 +0000 |
|---|---|---|
| committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-05-06 03:01:46 +0000 |
| commit | f8fe689a81f906d1b91bb3220acde2a4ecb14c5b (patch) | |
| tree | 26484e9d7e2c67806c2d1760196ff01aaa858e8c /src/recompiler/softmmu_defs.h | |
| parent | Initial commit. (diff) | |
| download | virtualbox-f8fe689a81f906d1b91bb3220acde2a4ecb14c5b.tar.xz virtualbox-f8fe689a81f906d1b91bb3220acde2a4ecb14c5b.zip | |
Adding upstream version 6.0.4-dfsg.upstream/6.0.4-dfsgupstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to '')
| -rw-r--r-- | src/recompiler/softmmu_defs.h | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/src/recompiler/softmmu_defs.h b/src/recompiler/softmmu_defs.h new file mode 100644 index 00000000..e23c3498 --- /dev/null +++ b/src/recompiler/softmmu_defs.h @@ -0,0 +1,57 @@ +#ifndef SOFTMMU_DEFS_H +#define SOFTMMU_DEFS_H + +#ifndef VBOX +uint8_t REGPARM __ldb_mmu(target_ulong addr, int mmu_idx); +void REGPARM __stb_mmu(target_ulong addr, uint8_t val, int mmu_idx); +uint16_t REGPARM __ldw_mmu(target_ulong addr, int mmu_idx); +void REGPARM __stw_mmu(target_ulong addr, uint16_t val, int mmu_idx); +uint32_t REGPARM __ldl_mmu(target_ulong addr, int mmu_idx); +void REGPARM __stl_mmu(target_ulong addr, uint32_t val, int mmu_idx); +uint64_t REGPARM __ldq_mmu(target_ulong addr, int mmu_idx); +void REGPARM __stq_mmu(target_ulong addr, uint64_t val, int mmu_idx); + +uint8_t REGPARM __ldb_cmmu(target_ulong addr, int mmu_idx); +void REGPARM __stb_cmmu(target_ulong addr, uint8_t val, int mmu_idx); +uint16_t REGPARM __ldw_cmmu(target_ulong addr, int mmu_idx); +void REGPARM __stw_cmmu(target_ulong addr, uint16_t val, int mmu_idx); +uint32_t REGPARM __ldl_cmmu(target_ulong addr, int mmu_idx); +void REGPARM __stl_cmmu(target_ulong addr, uint32_t val, int mmu_idx); +uint64_t REGPARM __ldq_cmmu(target_ulong addr, int mmu_idx); +void REGPARM __stq_cmmu(target_ulong addr, uint64_t val, int mmu_idx); +#else /* VBOX */ +RTCCUINTREG REGPARM __ldb_mmu(target_ulong addr, int mmu_idx); +void REGPARM __stb_mmu(target_ulong addr, uint8_t val, int mmu_idx); +RTCCUINTREG REGPARM __ldw_mmu(target_ulong addr, int mmu_idx); +void REGPARM __stw_mmu(target_ulong addr, uint16_t val, int mmu_idx); +RTCCUINTREG REGPARM __ldl_mmu(target_ulong addr, int mmu_idx); +void REGPARM __stl_mmu(target_ulong addr, uint32_t val, int mmu_idx); +uint64_t REGPARM __ldq_mmu(target_ulong addr, int mmu_idx); +void REGPARM __stq_mmu(target_ulong addr, uint64_t val, int mmu_idx); + +RTCCUINTREG REGPARM __ldb_cmmu(target_ulong addr, int mmu_idx); +void REGPARM __stb_cmmu(target_ulong addr, uint8_t val, int mmu_idx); +RTCCUINTREG REGPARM __ldw_cmmu(target_ulong addr, int mmu_idx); +void REGPARM __stw_cmmu(target_ulong addr, uint16_t val, int mmu_idx); +RTCCUINTREG REGPARM __ldl_cmmu(target_ulong addr, int mmu_idx); +void REGPARM __stl_cmmu(target_ulong addr, uint32_t val, int mmu_idx); +uint64_t REGPARM __ldq_cmmu(target_ulong addr, int mmu_idx); +void REGPARM __stq_cmmu(target_ulong addr, uint64_t val, int mmu_idx); + +# ifdef REM_PHYS_ADDR_IN_TLB +RTCCUINTREG REGPARM __ldb_vbox_phys(RTCCUINTREG addr); +RTCCUINTREG REGPARM __ldub_vbox_phys(RTCCUINTREG addr); +void REGPARM __stb_vbox_phys(RTCCUINTREG addr, RTCCUINTREG val); +RTCCUINTREG REGPARM __ldw_vbox_phys(RTCCUINTREG addr); +RTCCUINTREG REGPARM __lduw_vbox_phys(RTCCUINTREG addr); +void REGPARM __stw_vbox_phys(RTCCUINTREG addr, RTCCUINTREG val); +RTCCUINTREG REGPARM __ldl_vbox_phys(RTCCUINTREG addr); +RTCCUINTREG REGPARM __ldul_vbox_phys(RTCCUINTREG addr); +void REGPARM __stl_vbox_phys(RTCCUINTREG addr, RTCCUINTREG val); +uint64_t REGPARM __ldq_vbox_phys(RTCCUINTREG addr); +void REGPARM __stq_vbox_phys(RTCCUINTREG addr, uint64_t val); +# endif + +#endif /* VBOX */ + +#endif |