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Diffstat (limited to 'src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-template.mac')
| -rw-r--r-- | src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-template.mac | 405 |
1 files changed, 405 insertions, 0 deletions
diff --git a/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-template.mac b/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-template.mac new file mode 100644 index 00000000..e4050869 --- /dev/null +++ b/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-template.mac @@ -0,0 +1,405 @@ +; $Id: bs3-cpu-basic-2-template.mac $ +;; @file +; BS3Kit - bs3-cpu-basic-2 assembly template. +; + +; +; Copyright (C) 2007-2019 Oracle Corporation +; +; This file is part of VirtualBox Open Source Edition (OSE), as +; available from http://www.virtualbox.org. This file is free software; +; you can redistribute it and/or modify it under the terms of the GNU +; General Public License (GPL) as published by the Free Software +; Foundation, in version 2 as it comes in the "COPYING" file of the +; VirtualBox OSE distribution. VirtualBox OSE is distributed in the +; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind. +; +; The contents of this file may alternatively be used under the terms +; of the Common Development and Distribution License Version 1.0 +; (CDDL) only, as it comes in the "COPYING.CDDL" file of the +; VirtualBox OSE distribution, in which case the provisions of the +; CDDL are applicable instead of those of the GPL. +; +; You may elect to license modified versions of this file under the +; terms and conditions of either the GPL or the CDDL or both. +; + + +;********************************************************************************************************************************* +;* Header Files * +;********************************************************************************************************************************* +%include "bs3kit-template-header.mac" ; setup environment + + +;********************************************************************************************************************************* +;* External Symbols * +;********************************************************************************************************************************* +TMPL_BEGIN_TEXT + + +; +; Test code snippets containing code which differs between 16-bit, 32-bit +; and 64-bit CPUs modes. +; +%ifdef BS3_INSTANTIATING_CMN + +; +; SIDT +; +BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_bx_ud2, BS3_PBC_NEAR + sidt [xBX] +.again: ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_bx_ud2) == 3) +BS3_PROC_END_CMN bs3CpuBasic2_sidt_bx_ud2 + +BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_opsize_bx_ud2, BS3_PBC_NEAR + db X86_OP_PRF_SIZE_OP + sidt [xBX] +.again: ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_opsize_bx_ud2) == 4) +BS3_PROC_END_CMN bs3CpuBasic2_sidt_opsize_bx_ud2 + + %if TMPL_BITS == 64 +BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_rexw_bx_ud2, BS3_PBC_NEAR + db X86_OP_REX_W + sidt [xBX] +.again: ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_rexw_bx_ud2) == 4) +BS3_PROC_END_CMN bs3CpuBasic2_sidt_rexw_bx_ud2 + +BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_opsize_rexw_bx_ud2, BS3_PBC_NEAR + db X86_OP_PRF_SIZE_OP + db X86_OP_REX_W + sidt [xBX] +.again: ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_opsize_rexw_bx_ud2) == 5) +BS3_PROC_END_CMN bs3CpuBasic2_sidt_opsize_rexw_bx_ud2 + %endif + + %if TMPL_BITS != 64 +BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_ss_bx_ud2, BS3_PBC_NEAR + sidt [ss:xBX] +.again: ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_ss_bx_ud2) == 4) +BS3_PROC_END_CMN bs3CpuBasic2_sidt_ss_bx_ud2 + +BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_opsize_ss_bx_ud2, BS3_PBC_NEAR + db X86_OP_PRF_SIZE_OP + sidt [ss:xBX] +.again: ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_opsize_ss_bx_ud2) == 5) +BS3_PROC_END_CMN bs3CpuBasic2_sidt_opsize_ss_bx_ud2 + %endif + + +; +; SGDT +; +BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_bx_ud2, BS3_PBC_NEAR + sgdt [xBX] +.again: ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_bx_ud2) == 3) +BS3_PROC_END_CMN bs3CpuBasic2_sgdt_bx_ud2 + +BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_opsize_bx_ud2, BS3_PBC_NEAR + db X86_OP_PRF_SIZE_OP + sgdt [xBX] +.again: ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_opsize_bx_ud2) == 4) +BS3_PROC_END_CMN bs3CpuBasic2_sgdt_opsize_bx_ud2 + + %if TMPL_BITS == 64 +BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_rexw_bx_ud2, BS3_PBC_NEAR + db X86_OP_REX_W + sgdt [xBX] +.again: ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_rexw_bx_ud2) == 4) +BS3_PROC_END_CMN bs3CpuBasic2_sgdt_rexw_bx_ud2 + +BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_opsize_rexw_bx_ud2, BS3_PBC_NEAR + db X86_OP_PRF_SIZE_OP + db X86_OP_REX_W + sgdt [xBX] +.again: ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_opsize_rexw_bx_ud2) == 5) +BS3_PROC_END_CMN bs3CpuBasic2_sgdt_opsize_rexw_bx_ud2 + %endif + + %if TMPL_BITS != 64 +BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_ss_bx_ud2, BS3_PBC_NEAR + sgdt [ss:xBX] +.again: ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_ss_bx_ud2) == 4) +BS3_PROC_END_CMN bs3CpuBasic2_sgdt_ss_bx_ud2 + +BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_opsize_ss_bx_ud2, BS3_PBC_NEAR + db X86_OP_PRF_SIZE_OP + sgdt [ss:xBX] +.again: ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_opsize_ss_bx_ud2) == 5) +BS3_PROC_END_CMN bs3CpuBasic2_sgdt_opsize_ss_bx_ud2 + %endif + + +; +; LIDT +; +BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR + lidt [xBX] + sidt [BS3_NOT_64BIT(es:) xDI] + lidt [BS3_NOT_64BIT(es:) xSI] +.again: + ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_bx__sidt_es_di__lidt_es_si__ud2) == BS3_IF_64BIT_OTHERWISE(9,11)) +BS3_PROC_END_CMN bs3CpuBasic2_lidt_bx__sidt_es_di__lidt_es_si__ud2 + +BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_opsize_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR + db X86_OP_PRF_SIZE_OP + lidt [xBX] + sidt [BS3_NOT_64BIT(es:) xDI] + lidt [BS3_NOT_64BIT(es:) xSI] +.again: + ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_opsize_bx__sidt_es_di__lidt_es_si__ud2) == BS3_IF_64BIT_OTHERWISE(10,12)) +BS3_PROC_END_CMN bs3CpuBasic2_lidt_opsize_bx__sidt_es_di__lidt_es_si__ud2 + +%if TMPL_BITS == 16 +BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_opsize_bx__sidt32_es_di__lidt_es_si__ud2, BS3_PBC_NEAR + db X86_OP_PRF_SIZE_OP + lidt [xBX] + jmp dword BS3_SEL_R0_CS32:.in_32bit wrt FLAT + BS3_SET_BITS 32 +.in_32bit: + sidt [es:edi] + lidt [es:esi] + jmp dword BS3_SEL_R0_CS16:.again wrt CGROUP16 + BS3_SET_BITS 16 +.again: + ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_opsize_bx__sidt32_es_di__lidt_es_si__ud2) == 27) +BS3_PROC_END_CMN bs3CpuBasic2_lidt_opsize_bx__sidt32_es_di__lidt_es_si__ud2 +%endif + + %if TMPL_BITS == 64 +BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_rexw_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR + db X86_OP_REX_W + lidt [xBX] + sidt [xDI] + lidt [xSI] +.again: + ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_rexw_bx__sidt_es_di__lidt_es_si__ud2) == 10) +BS3_PROC_END_CMN bs3CpuBasic2_lidt_rexw_bx__sidt_es_di__lidt_es_si__ud2 + +BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_opsize_rexw_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR + db X86_OP_PRF_SIZE_OP + db X86_OP_REX_W + lidt [xBX] + sidt [xDI] + lidt [xSI] +.again: + ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_opsize_rexw_bx__sidt_es_di__lidt_es_si__ud2) == 11) +BS3_PROC_END_CMN bs3CpuBasic2_lidt_opsize_rexw_bx__sidt_es_di__lidt_es_si__ud2 + %endif + + %if TMPL_BITS != 64 +BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_ss_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR + lidt [ss:xBX] + sidt [BS3_NOT_64BIT(es:) xDI] + lidt [BS3_NOT_64BIT(es:) xSI] +.again: + ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_ss_bx__sidt_es_di__lidt_es_si__ud2) == 12) +BS3_PROC_END_CMN bs3CpuBasic2_lidt_ss_bx__sidt_es_di__lidt_es_si__ud2 + +BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_opsize_ss_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR + db X86_OP_PRF_SIZE_OP + lidt [ss:xBX] + sidt [BS3_NOT_64BIT(es:) xDI] + lidt [BS3_NOT_64BIT(es:) xSI] +.again: + ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_opsize_ss_bx__sidt_es_di__lidt_es_si__ud2) == 13) +BS3_PROC_END_CMN bs3CpuBasic2_lidt_opsize_ss_bx__sidt_es_di__lidt_es_si__ud2 + %endif + + +; +; LGDT +; +BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR + lgdt [xBX] + sgdt [BS3_NOT_64BIT(es:) xDI] + lgdt [BS3_NOT_64BIT(es:) xSI] +.again: + ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_bx__sgdt_es_di__lgdt_es_si__ud2) == BS3_IF_64BIT_OTHERWISE(9,11)) +BS3_PROC_END_CMN bs3CpuBasic2_lgdt_bx__sgdt_es_di__lgdt_es_si__ud2 + +BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_opsize_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR + db X86_OP_PRF_SIZE_OP + lgdt [xBX] + sgdt [BS3_NOT_64BIT(es:) xDI] + lgdt [BS3_NOT_64BIT(es:) xSI] +.again: + ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_opsize_bx__sgdt_es_di__lgdt_es_si__ud2) == BS3_IF_64BIT_OTHERWISE(10,12)) +BS3_PROC_END_CMN bs3CpuBasic2_lgdt_opsize_bx__sgdt_es_di__lgdt_es_si__ud2 + + %if TMPL_BITS == 64 +BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_rexw_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR + db X86_OP_REX_W + lgdt [xBX] + sgdt [xDI] + lgdt [xSI] +.again: + ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_rexw_bx__sgdt_es_di__lgdt_es_si__ud2) == 10) +BS3_PROC_END_CMN bs3CpuBasic2_lgdt_rexw_bx__sgdt_es_di__lgdt_es_si__ud2 + +BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_opsize_rexw_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR + db X86_OP_PRF_SIZE_OP + db X86_OP_REX_W + lgdt [xBX] + sgdt [xDI] + lgdt [xSI] +.again: + ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_opsize_rexw_bx__sgdt_es_di__lgdt_es_si__ud2) == 11) +BS3_PROC_END_CMN bs3CpuBasic2_lgdt_opsize_rexw_bx__sgdt_es_di__lgdt_es_si__ud2 + %endif + + %if TMPL_BITS != 64 +BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_ss_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR + lgdt [ss:xBX] + sgdt [BS3_NOT_64BIT(es:) xDI] + lgdt [BS3_NOT_64BIT(es:) xSI] +.again: + ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_ss_bx__sgdt_es_di__lgdt_es_si__ud2) == 12) +BS3_PROC_END_CMN bs3CpuBasic2_lgdt_ss_bx__sgdt_es_di__lgdt_es_si__ud2 + +BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_opsize_ss_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR + db X86_OP_PRF_SIZE_OP + lgdt [ss:xBX] + sgdt [BS3_NOT_64BIT(es:) xDI] + lgdt [BS3_NOT_64BIT(es:) xSI] +.again: + ud2 + jmp .again +AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_opsize_ss_bx__sgdt_es_di__lgdt_es_si__ud2) == 13) +BS3_PROC_END_CMN bs3CpuBasic2_lgdt_opsize_ss_bx__sgdt_es_di__lgdt_es_si__ud2 + %endif + +; +; #PF +; + +; For testing read access. +BS3_PROC_BEGIN_CMN bs3CpuBasic2_mov_ax_ds_bx__ud2, BS3_PBC_NEAR + mov xAX, [xBX] +.again: ud2 + jmp .again +AssertCompile(.again - BS3_LAST_LABEL == 2 + (TMPL_BITS == 64)) +BS3_PROC_END_CMN bs3CpuBasic2_mov_ax_ds_bx__ud2 + + +; For testing write access. +BS3_PROC_BEGIN_CMN bs3CpuBasic2_mov_ds_bx_ax__ud2, BS3_PBC_NEAR + mov [xBX], xAX +.again: ud2 + jmp .again +AssertCompile(.again - BS3_LAST_LABEL == 2 + (TMPL_BITS == 64)) +BS3_PROC_END_CMN bs3CpuBasic2_mov_ds_bx_ax__ud2 + + +; For testing read+write access. +BS3_PROC_BEGIN_CMN bs3CpuBasic2_xchg_ds_bx_ax__ud2, BS3_PBC_NEAR + xchg [xBX], xAX +.again: ud2 + jmp .again +AssertCompile(.again - BS3_LAST_LABEL == 2 + (TMPL_BITS == 64)) +BS3_PROC_END_CMN bs3CpuBasic2_xchg_ds_bx_ax__ud2 + + +; Another read+write access test. +BS3_PROC_BEGIN_CMN bs3CpuBasic2_cmpxchg_ds_bx_cx__ud2, BS3_PBC_NEAR + cmpxchg [xBX], xCX +.again: ud2 + jmp .again +AssertCompile(.again - BS3_LAST_LABEL == 3 + (TMPL_BITS == 64)) +BS3_PROC_END_CMN bs3CpuBasic2_cmpxchg_ds_bx_cx__ud2 + + +; For testing read access from an aborted instruction: DIV by zero +BS3_PROC_BEGIN_CMN bs3CpuBasic2_div_ds_bx__ud2, BS3_PBC_NEAR + div xPRE [xBX] +.again: ud2 + jmp .again +AssertCompile(.again - BS3_LAST_LABEL == 2 + (TMPL_BITS == 64)) +BS3_PROC_END_CMN bs3CpuBasic2_div_ds_bx__ud2 + + +; Two memory operands: push [mem] +BS3_PROC_BEGIN_CMN bs3CpuBasic2_push_ds_bx__ud2, BS3_PBC_NEAR + push xPRE [xBX] +.again: ud2 + jmp .again +AssertCompile(.again - BS3_LAST_LABEL == 2) +BS3_PROC_END_CMN bs3CpuBasic2_push_ds_bx__ud2 + +; Two memory operands: pop [mem] +BS3_PROC_BEGIN_CMN bs3CpuBasic2_push_ax__pop_ds_bx__ud2, BS3_PBC_NEAR + push xAX + pop xPRE [xBX] +.again: ud2 + jmp .again +AssertCompile(.again - BS3_LAST_LABEL == 3) +BS3_PROC_END_CMN bs3CpuBasic2_push_ax__pop_ds_bx__ud2 + +; Two memory operands: call [mem] +BS3_PROC_BEGIN_CMN bs3CpuBasic2_call_ds_bx__ud2, BS3_PBC_NEAR + call xPRE [xBX] +.again: ud2 + jmp .again +AssertCompile(.again - BS3_LAST_LABEL == 2) +BS3_PROC_END_CMN bs3CpuBasic2_call_ds_bx__ud2 + +; For testing #GP vs #PF write +BS3_PROC_BEGIN_CMN bs3CpuBasic2_insb__ud2, BS3_PBC_NEAR + insb +.again: ud2 + jmp .again +AssertCompile(.again - BS3_LAST_LABEL == 1) +BS3_PROC_END_CMN bs3CpuBasic2_insb__ud2 + + +%endif ; BS3_INSTANTIATING_CMN + +%include "bs3kit-template-footer.mac" ; reset environment + |