From f8fe689a81f906d1b91bb3220acde2a4ecb14c5b Mon Sep 17 00:00:00 2001
From: Daniel Baumann <daniel.baumann@progress-linux.org>
Date: Mon, 6 May 2024 05:01:46 +0200
Subject: Adding upstream version 6.0.4-dfsg.

Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
---
 src/VBox/Runtime/common/string/strcmp.asm | 101 ++++++++++++++++++++++++++++++
 1 file changed, 101 insertions(+)
 create mode 100644 src/VBox/Runtime/common/string/strcmp.asm

(limited to 'src/VBox/Runtime/common/string/strcmp.asm')

diff --git a/src/VBox/Runtime/common/string/strcmp.asm b/src/VBox/Runtime/common/string/strcmp.asm
new file mode 100644
index 00000000..2d1f82fa
--- /dev/null
+++ b/src/VBox/Runtime/common/string/strcmp.asm
@@ -0,0 +1,101 @@
+; $Id: strcmp.asm $
+;; @file
+; IPRT - No-CRT strcmp - AMD64 & X86.
+;
+
+;
+; Copyright (C) 2006-2019 Oracle Corporation
+;
+; This file is part of VirtualBox Open Source Edition (OSE), as
+; available from http://www.virtualbox.org. This file is free software;
+; you can redistribute it and/or modify it under the terms of the GNU
+; General Public License (GPL) as published by the Free Software
+; Foundation, in version 2 as it comes in the "COPYING" file of the
+; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
+; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
+;
+; The contents of this file may alternatively be used under the terms
+; of the Common Development and Distribution License Version 1.0
+; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
+; VirtualBox OSE distribution, in which case the provisions of the
+; CDDL are applicable instead of those of the GPL.
+;
+; You may elect to license modified versions of this file under the
+; terms and conditions of either the GPL or the CDDL or both.
+;
+
+%include "iprt/asmdefs.mac"
+
+BEGINCODE
+
+;;
+; @param    psz1   gcc: rdi  msc: rcx  x86:[esp+4]  wcall: eax
+; @param    psz2   gcc: rsi  msc: rdx  x86:[esp+8]  wcall: edx
+RT_NOCRT_BEGINPROC strcmp
+        ; input
+%ifdef RT_ARCH_AMD64
+ %ifdef ASM_CALL64_MSC
+  %define psz1 rcx
+  %define psz2 rdx
+ %else
+  %define psz1 rdi
+  %define psz2 rsi
+ %endif
+%else
+ %ifdef ASM_CALL32_WATCOM
+        mov     ecx, eax
+ %else
+        mov     ecx, [esp + 4]
+        mov     edx, [esp + 8]
+ %endif
+ %define psz1 ecx
+ %define psz2 edx
+%endif
+
+        ;
+        ; The loop.
+        ;
+.next:
+        mov     al, [psz1]
+        mov     ah, [psz2]
+        cmp     al, ah
+        jne     .not_equal
+        test    al, al
+        jz      .equal
+
+        mov     al, [psz1 + 1]
+        mov     ah, [psz2 + 1]
+        cmp     al, ah
+        jne     .not_equal
+        test    al, al
+        jz      .equal
+
+        mov     al, [psz1 + 2]
+        mov     ah, [psz2 + 2]
+        cmp     al, ah
+        jne     .not_equal
+        test    al, al
+        jz      .equal
+
+        mov     al, [psz1 + 3]
+        mov     ah, [psz2 + 3]
+        cmp     al, ah
+        jne     .not_equal
+        test    al, al
+        jz      .equal
+
+        add     psz1, 4
+        add     psz2, 4
+        jmp     .next
+
+.equal:
+        xor     eax, eax
+        ret
+
+.not_equal:
+        movzx   ecx, ah
+        and     eax, 0ffh
+        sub     eax, ecx
+        ret
+ENDPROC RT_NOCRT(strcmp)
+
-- 
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