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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-28 09:13:47 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-28 09:13:47 +0000 |
commit | 102b0d2daa97dae68d3eed54d8fe37a9cc38a892 (patch) | |
tree | bcf648efac40ca6139842707f0eba5a4496a6dd2 /include/drivers/marvell/mochi | |
parent | Initial commit. (diff) | |
download | arm-trusted-firmware-upstream/2.8.0+dfsg.tar.xz arm-trusted-firmware-upstream/2.8.0+dfsg.zip |
Adding upstream version 2.8.0+dfsg.upstream/2.8.0+dfsgupstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'include/drivers/marvell/mochi')
-rw-r--r-- | include/drivers/marvell/mochi/ap_setup.h | 18 | ||||
-rw-r--r-- | include/drivers/marvell/mochi/cp110_setup.h | 66 |
2 files changed, 84 insertions, 0 deletions
diff --git a/include/drivers/marvell/mochi/ap_setup.h b/include/drivers/marvell/mochi/ap_setup.h new file mode 100644 index 0000000..5b0e75f --- /dev/null +++ b/include/drivers/marvell/mochi/ap_setup.h @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2018 Marvell International Ltd. + * + * SPDX-License-Identifier: BSD-3-Clause + * https://spdx.org/licenses + */ + +/* AP8xx Marvell SoC driver */ + +#ifndef AP_SETUP_H +#define AP_SETUP_H + +void ap_init(void); +void ap_ble_init(void); +int ap_get_count(void); +void update_cp110_default_win(int cp_id); + +#endif /* AP_SETUP_H */ diff --git a/include/drivers/marvell/mochi/cp110_setup.h b/include/drivers/marvell/mochi/cp110_setup.h new file mode 100644 index 0000000..4a69257 --- /dev/null +++ b/include/drivers/marvell/mochi/cp110_setup.h @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2018 Marvell International Ltd. + * + * SPDX-License-Identifier: BSD-3-Clause + * https://spdx.org/licenses + */ + +/* CP110 Marvell SoC driver */ + +#ifndef CP110_SETUP_H +#define CP110_SETUP_H + +#include <lib/mmio.h> + +#include <mvebu_def.h> + +#define MVEBU_DEVICE_ID_REG (MVEBU_CP_DFX_OFFSET + 0x40) +#define MVEBU_DEVICE_ID_OFFSET (0) +#define MVEBU_DEVICE_ID_MASK (0xffff << MVEBU_DEVICE_ID_OFFSET) +#define MVEBU_DEVICE_REV_OFFSET (16) +#define MVEBU_DEVICE_REV_MASK (0xf << MVEBU_DEVICE_REV_OFFSET) +#define MVEBU_70X0_DEV_ID (0x7040) +#define MVEBU_70X0_CP115_DEV_ID (0x7045) +#define MVEBU_3900_DEV_ID (0x6025) +#define MVEBU_80X0_DEV_ID (0x8040) +#define MVEBU_80X0_CP115_DEV_ID (0x8045) +#define MVEBU_CN9130_DEV_ID (0x7025) +#define MVEBU_CP110_SA_DEV_ID (0x110) +#define MVEBU_CP110_REF_ID_A1 1 +#define MVEBU_CP110_REF_ID_A2 2 +#define MAX_STREAM_ID_PER_CP (0x10) +#define STREAM_ID_BASE (0x40) + +#define MVEBU_SECUREBOOT_CTRL_REG (MVEBU_RFU_BASE + 0x4730) +#define MVEBU_SECUREBOOT_EN_MASK BIT(0) + +static inline uint32_t cp110_device_id_get(uintptr_t base) +{ + /* Returns: + * - MVEBU_70X0_DEV_ID for A70X0 family + * - MVEBU_80X0_DEV_ID for A80X0 family + * - MVEBU_CP110_SA_DEV_ID for CP that connected stand alone + */ + return (mmio_read_32(base + MVEBU_DEVICE_ID_REG) >> + MVEBU_DEVICE_ID_OFFSET) & + MVEBU_DEVICE_ID_MASK; +} + +static inline uint32_t cp110_rev_id_get(uintptr_t base) +{ + return (mmio_read_32(base + MVEBU_DEVICE_ID_REG) & + MVEBU_DEVICE_REV_MASK) >> + MVEBU_DEVICE_REV_OFFSET; +} + +static inline uint32_t is_secure(void) +{ + return !!(mmio_read_32(MVEBU_SECUREBOOT_CTRL_REG) & + MVEBU_SECUREBOOT_EN_MASK); +} + +void cp110_init(uintptr_t cp110_base, uint32_t stream_id); +void cp110_ble_init(uintptr_t cp110_base); +void cp110_amb_init(uintptr_t base); + +#endif /* CP110_SETUP_H */ |