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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-28 09:13:47 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-28 09:13:47 +0000 |
commit | 102b0d2daa97dae68d3eed54d8fe37a9cc38a892 (patch) | |
tree | bcf648efac40ca6139842707f0eba5a4496a6dd2 /plat/imx/common/include/imx_snvs.h | |
parent | Initial commit. (diff) | |
download | arm-trusted-firmware-upstream/2.8.0+dfsg.tar.xz arm-trusted-firmware-upstream/2.8.0+dfsg.zip |
Adding upstream version 2.8.0+dfsg.upstream/2.8.0+dfsgupstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'plat/imx/common/include/imx_snvs.h')
-rw-r--r-- | plat/imx/common/include/imx_snvs.h | 84 |
1 files changed, 84 insertions, 0 deletions
diff --git a/plat/imx/common/include/imx_snvs.h b/plat/imx/common/include/imx_snvs.h new file mode 100644 index 0000000..565c451 --- /dev/null +++ b/plat/imx/common/include/imx_snvs.h @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2018-2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#ifndef IMX_SNVS_H +#define IMX_SNVS_H + +#include <cdefs.h> +#include <stdint.h> + +#include <arch.h> + +struct snvs { + uint32_t hplr; + uint32_t hpcomr; + uint32_t hpcr; + uint32_t hpsicr; + uint32_t hpsvcr; + uint32_t hpsr; + uint32_t hpsvsr; + uint32_t hphacivr; + uint32_t hphacr; + uint32_t hprtcmr; + uint32_t hprtclr; + uint32_t hptamr; + uint32_t hptalr; + uint32_t lplr; + uint32_t lpcr; + uint32_t lpmkcr; + uint32_t lpsvcr; + uint32_t lptgfcr; + uint32_t lptdcr; + uint32_t lpsr; + uint32_t lpsrtcmr; + uint32_t lpsrtclr; + uint32_t lptar; + uint32_t lpsmcmr; + uint32_t lpsmclr; + uint32_t lppgdr; + uint32_t lpgpr0_alias; + uint8_t lpzmkr[32]; + uint16_t res0; + uint32_t lpgpr0[4]; + uint32_t lptdc2r; + uint32_t lptdsr; + uint32_t lptgf1cr; + uint32_t lptgf2cr; + uint32_t res1[4]; + uint32_t lpat1cr; + uint32_t lpat2cr; + uint32_t lpat3cr; + uint32_t lpat4cr; + uint32_t lpat5cr; + uint32_t res2[3]; + uint32_t lpatctlr; + uint32_t lpatclkr; + uint32_t lpatrc1r; + uint32_t lpatrc2r; + uint32_t res3[706]; + uint32_t hpvidr1; + uint32_t hpvidr2; +} __packed; + +/* Define the HPCOMR bits */ +#define HPCOMR_NPSWA_EN BIT(31) +#define HPCOMR_HAC_STOP BIT(19) +#define HPCOMR_HAC_CLEAR BIT(18) +#define HPCOMR_HAC_LOAD BIT(17) +#define HPCOMR_HAC_EN BIT(16) +#define HPCOMR_MKS_EN BIT(13) +#define HPCOMR_PROG_ZMK BIT(12) +#define HPCOMR_SW_LPSV BIT(10) +#define HPCOMR_SW_FSV BIT(9) +#define HPCOMR_SW_SV BIT(8) +#define HPCOMR_LP_SWR_DIS BIT(5) +#define HPCOMR_LP_SWR BIT(4) +#define HPCOMR_SSM_SFNS_DIS BIT(2) +#define HPCOMR_SSM_ST_DIS BIT(1) +#define HPCOMR_SSM_ST BIT(0) + +void imx_snvs_init(void); + +#endif /* IMX_SNVS_H */ |