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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-28 09:13:47 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-28 09:13:47 +0000 |
commit | 102b0d2daa97dae68d3eed54d8fe37a9cc38a892 (patch) | |
tree | bcf648efac40ca6139842707f0eba5a4496a6dd2 /plat/nvidia/tegra/soc/t194/plat_smmu.c | |
parent | Initial commit. (diff) | |
download | arm-trusted-firmware-102b0d2daa97dae68d3eed54d8fe37a9cc38a892.tar.xz arm-trusted-firmware-102b0d2daa97dae68d3eed54d8fe37a9cc38a892.zip |
Adding upstream version 2.8.0+dfsg.upstream/2.8.0+dfsgupstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to '')
-rw-r--r-- | plat/nvidia/tegra/soc/t194/plat_smmu.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/plat/nvidia/tegra/soc/t194/plat_smmu.c b/plat/nvidia/tegra/soc/t194/plat_smmu.c new file mode 100644 index 0000000..310e951 --- /dev/null +++ b/plat/nvidia/tegra/soc/t194/plat_smmu.c @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include <common/bl_common.h> +#include <common/debug.h> +#include <smmu.h> +#include <tegra_def.h> + +#define BOARD_SYSTEM_FPGA_BASE U(1) +#define BASE_CONFIG_SMMU_DEVICES U(2) +#define MAX_NUM_SMMU_DEVICES U(3) + +static uint32_t tegra_misc_read_32(uint32_t off) +{ + return mmio_read_32((uintptr_t)TEGRA_MISC_BASE + off); +} + +/******************************************************************************* + * Handler to return the support SMMU devices number + ******************************************************************************/ +uint32_t plat_get_num_smmu_devices(void) +{ + uint32_t ret_num = MAX_NUM_SMMU_DEVICES; + uint32_t board_revid = ((tegra_misc_read_32(MISCREG_EMU_REVID) >> \ + BOARD_SHIFT_BITS) & BOARD_MASK_BITS); + + if (board_revid == BOARD_SYSTEM_FPGA_BASE) { + ret_num = BASE_CONFIG_SMMU_DEVICES; + } + + return ret_num; +} |