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Diffstat (limited to '')
| -rw-r--r-- | include/lib/cpus/aarch64/cortex_a35.h | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/include/lib/cpus/aarch64/cortex_a35.h b/include/lib/cpus/aarch64/cortex_a35.h new file mode 100644 index 0000000..5421478 --- /dev/null +++ b/include/lib/cpus/aarch64/cortex_a35.h @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef CORTEX_A35_H +#define CORTEX_A35_H + +#include <lib/utils_def.h> + +/* Cortex-A35 Main ID register for revision 0 */ +#define CORTEX_A35_MIDR U(0x410FD040) + +/******************************************************************************* + * CPU Extended Control register specific definitions. + * CPUECTLR_EL1 is an implementation-specific register. + ******************************************************************************/ +#define CORTEX_A35_CPUECTLR_EL1 S3_1_C15_C2_1 +#define CORTEX_A35_CPUECTLR_SMPEN_BIT (ULL(1) << 6) + +/******************************************************************************* + * CPU Auxiliary Control register specific definitions. + ******************************************************************************/ +#define CORTEX_A35_CPUACTLR_EL1 S3_1_C15_C2_0 + +#define CORTEX_A35_CPUACTLR_EL1_ENDCCASCI (ULL(1) << 44) + +#endif /* CORTEX_A35_H */ |