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Diffstat (limited to '')
| -rw-r--r-- | include/lib/cpus/aarch64/neoverse_poseidon.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/include/lib/cpus/aarch64/neoverse_poseidon.h b/include/lib/cpus/aarch64/neoverse_poseidon.h new file mode 100644 index 0000000..798ecd1 --- /dev/null +++ b/include/lib/cpus/aarch64/neoverse_poseidon.h @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2022, ARM Limited. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef NEOVERSE_POSEIDON_H +#define NEOVERSE_POSEIDON_H + + +#define NEOVERSE_POSEIDON_MIDR U(0x410FD830) + +/* Neoverse Poseidon loop count for CVE-2022-23960 mitigation */ +#define NEOVERSE_POSEIDON_BHB_LOOP_COUNT U(132) + +/******************************************************************************* + * CPU Extended Control register specific definitions. + ******************************************************************************/ +#define NEOVERSE_POSEIDON_CPUECTLR_EL1 S3_0_C15_C1_4 + +/******************************************************************************* + * CPU Power Control register specific definitions + ******************************************************************************/ +#define NEOVERSE_POSEIDON_CPUPWRCTLR_EL1 S3_0_C15_C2_7 +#define NEOVERSE_POSEIDON_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1) + +#endif /* NEOVERSE_POSEIDON_H */ |