diff options
Diffstat (limited to 'plat/mediatek/include')
| -rw-r--r-- | plat/mediatek/include/armv8_2/arch_def.h | 38 | ||||
| -rw-r--r-- | plat/mediatek/include/lib/mtk_init/mtk_init.h | 58 | ||||
| -rw-r--r-- | plat/mediatek/include/lib/mtk_init/mtk_init_def.h | 22 | ||||
| -rw-r--r-- | plat/mediatek/include/mtk_mmap_pool.h | 58 | ||||
| -rw-r--r-- | plat/mediatek/include/mtk_sip_def.h | 25 | ||||
| -rw-r--r-- | plat/mediatek/include/mtk_sip_svc.h | 106 | ||||
| -rw-r--r-- | plat/mediatek/include/plat.ld.rodata.inc | 30 | ||||
| -rw-r--r-- | plat/mediatek/include/vendor_pubsub_events.h | 21 |
8 files changed, 358 insertions, 0 deletions
diff --git a/plat/mediatek/include/armv8_2/arch_def.h b/plat/mediatek/include/armv8_2/arch_def.h new file mode 100644 index 0000000..61f818f --- /dev/null +++ b/plat/mediatek/include/armv8_2/arch_def.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2022, Mediatek Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARCH_DEF_H +#define ARCH_DEF_H + +/* Topology constants */ +#define PLAT_MAX_PWR_LVL (2) +#define PLAT_MAX_RET_STATE (1) +#define PLAT_MAX_OFF_STATE (2) + +#define PLATFORM_SYSTEM_COUNT (1) +#define PLATFORM_CLUSTER_COUNT (1) +#define PLATFORM_CLUSTER0_CORE_COUNT (8) +#define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER0_CORE_COUNT) +#define PLATFORM_MAX_CPUS_PER_CLUSTER (8) +#define PLATFORM_NUM_AFFS (PLATFORM_SYSTEM_COUNT + \ + PLATFORM_CLUSTER_COUNT + \ + PLATFORM_CORE_COUNT) + +/******************************************************************************* + * Declarations and constants to access the mailboxes safely. Each mailbox is + * aligned on the biggest cache line size in the platform. This is known only + * to the platform as it might have a combination of integrated and external + * caches. Such alignment ensures that two maiboxes do not sit on the same cache + * line at any cache level. They could belong to different cpus/clusters & + * get written while being protected by different locks causing corruption of + * a valid mailbox address. + ******************************************************************************/ +/* Cachline size */ +#define CACHE_WRITEBACK_SHIFT (6) +#define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) + +#endif /* ARCH_DEF_H */ + diff --git a/plat/mediatek/include/lib/mtk_init/mtk_init.h b/plat/mediatek/include/lib/mtk_init/mtk_init.h new file mode 100644 index 0000000..6f23a9b --- /dev/null +++ b/plat/mediatek/include/lib/mtk_init/mtk_init.h @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2022, MediaTek Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef MTK_INIT_H +#define MTK_INIT_H + +#include <cdefs.h> +#include <lib/mtk_init/mtk_init_def.h> + +#define INIT_CALL_EXPAND_AS_ENUMERATION(_section_enum, _section_name, _level) \ + _section_enum = _level, + +#define EXPAND_AS_LINK_SECTION(_section_enum, _section_name, _level) \ + __##_section_enum##_START__ = .; \ + KEEP(*(_section_name##_level)); + +#define EXPAND_AS_EXTERN(_section_enum, _section_name, _level) \ + extern struct initcall __##_section_enum##_START__[]; + +#define EXPAND_AS_SYMBOL_ARR(_section_enum, _section_name, _level) \ + __##_section_enum##_START__, + +#define DECLARE_MTK_INITCALL(_fn, _level) \ + const struct initcall _mtk_initcall_##_fn \ + __used \ + __aligned(sizeof(void *)) \ + __section(".mtk_plat_initcall_"#_level) \ + = { \ + .name = #_fn, \ + .fn = _fn \ + } + +/* initcall helpers */ +#define MTK_EARLY_PLAT_INIT(_fn) DECLARE_MTK_INITCALL(_fn, 0) +#define MTK_ARCH_INIT(_fn) DECLARE_MTK_INITCALL(_fn, 1) +#define MTK_PLAT_SETUP_0_INIT(_fn) DECLARE_MTK_INITCALL(_fn, 2) +#define MTK_PLAT_SETUP_1_INIT(_fn) DECLARE_MTK_INITCALL(_fn, 3) +#define MTK_PLAT_RUNTIME_INIT(_fn) DECLARE_MTK_INITCALL(_fn, 4) +#define MTK_PLAT_BL33_DEFER_INIT(_fn) DECLARE_MTK_INITCALL(_fn, 5) + +#ifndef __ASSEMBLER__ +struct initcall { + const char *name; + int (*fn)(void); +}; + +enum { + INIT_CALL_TABLE(INIT_CALL_EXPAND_AS_ENUMERATION) + MTK_INIT_LVL_MAX +}; + +void mtk_init_one_level(unsigned int level); +#endif + +#endif /* MTK_INIT_H */ diff --git a/plat/mediatek/include/lib/mtk_init/mtk_init_def.h b/plat/mediatek/include/lib/mtk_init/mtk_init_def.h new file mode 100644 index 0000000..8aae41d --- /dev/null +++ b/plat/mediatek/include/lib/mtk_init/mtk_init_def.h @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2022, MediaTek Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef MTK_INIT_DEF_H +#define MTK_INIT_DEF_H + +/* + * Define init call sections here. _func is for 2nd level expansion, init + * section enum, and init section name. + */ +#define INIT_CALL_TABLE(_func) \ + _func(MTK_INIT_LVL_EARLY_PLAT, .mtk_plat_initcall_, 0) \ + _func(MTK_INIT_LVL_ARCH, .mtk_plat_initcall_, 1) \ + _func(MTK_INIT_LVL_PLAT_SETUP_0, .mtk_plat_initcall_, 2) \ + _func(MTK_INIT_LVL_PLAT_SETUP_1, .mtk_plat_initcall_, 3) \ + _func(MTK_INIT_LVL_PLAT_RUNTIME, .mtk_plat_initcall_, 4) \ + _func(MTK_INIT_LVL_BL33_DEFER, .mtk_plat_initcall_, 5) + +#endif /* MTK_INIT_DEF_H */ diff --git a/plat/mediatek/include/mtk_mmap_pool.h b/plat/mediatek/include/mtk_mmap_pool.h new file mode 100644 index 0000000..99d1bff --- /dev/null +++ b/plat/mediatek/include/mtk_mmap_pool.h @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2022, MediaTek Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef MTK_MMAP_POOL_H +#define MTK_MMAP_POOL_H + +#include <cdefs.h> +#include <lib/xlat_tables/xlat_tables_compat.h> + +struct mtk_mmap_descriptor { + const char *mmap_name; + const mmap_region_t *mmap_ptr; + const uint32_t mmap_size; +}; + +#define MTK_MMAP_SECTION \ + __used \ + __aligned(sizeof(void *)) \ + __section(".mtk_mmap_lists") + +#define DECLARE_MTK_MMAP_REGIONS(_mmap_array) \ + static const struct mtk_mmap_descriptor _mtk_mmap_descriptor_##_mmap_array \ + __used \ + __aligned(sizeof(void *)) \ + __section(".mtk_mmap_pool") \ + = { \ + .mmap_name = #_mmap_array, \ + .mmap_ptr = _mmap_array, \ + .mmap_size = ARRAY_SIZE(_mmap_array) \ + } + +#define MAP_BL_RW MAP_REGION_FLAT( \ + DATA_START, \ + BL_END - DATA_START, \ + MT_MEMORY | MT_RW | MT_SECURE) + +#if SEPARATE_CODE_AND_RODATA +#define MAP_BL_RO \ + MAP_REGION_FLAT( \ + BL_CODE_BASE, \ + BL_CODE_END - BL_CODE_BASE, \ + MT_CODE | MT_SECURE), \ + MAP_REGION_FLAT( \ + BL_RO_DATA_BASE, \ + BL_RO_DATA_END - BL_RO_DATA_BASE, \ + MT_RO_DATA | MT_SECURE) +#else +#define MAP_BL_RO MAP_REGION_FLAT(BL_CODE_BASE, \ + BL_CODE_END - BL_CODE_BASE, \ + MT_CODE | MT_SECURE) +#endif + +void mtk_xlat_init(const mmap_region_t *bl_regions); + +#endif /* MTK_MMAP_POOL_H */ diff --git a/plat/mediatek/include/mtk_sip_def.h b/plat/mediatek/include/mtk_sip_def.h new file mode 100644 index 0000000..2039017 --- /dev/null +++ b/plat/mediatek/include/mtk_sip_def.h @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2022, MediaTek Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef MTK_SIP_DEF_H +#define MTK_SIP_DEF_H + +/* Define SiP SMC ID here */ +#define MTK_SIP_SMC_FROM_NS_EL1_TABLE(_func) \ + _func(MTK_SIP_KERNEL_TIME_SYNC, 0x202) \ + _func(MTK_SIP_KERNEL_DFD, 0x205) \ + _func(MTK_SIP_KERNEL_MSDC, 0x273) \ + _func(MTK_SIP_VCORE_CONTROL, 0x506) \ + _func(MTK_SIP_IOMMU_CONTROL, 0x514) \ + _func(MTK_SIP_AUDIO_CONTROL, 0x517) \ + _func(MTK_SIP_APUSYS_CONTROL, 0x51E) \ + _func(MTK_SIP_DP_CONTROL, 0x523) \ + _func(MTK_SIP_KERNEL_GIC_OP, 0x526) + +#define MTK_SIP_SMC_FROM_BL33_TABLE(_func) \ + _func(MTK_SIP_KERNEL_BOOT, 0x115) + +#endif /* MTK_SIP_DEF_H */ diff --git a/plat/mediatek/include/mtk_sip_svc.h b/plat/mediatek/include/mtk_sip_svc.h new file mode 100644 index 0000000..ce51048 --- /dev/null +++ b/plat/mediatek/include/mtk_sip_svc.h @@ -0,0 +1,106 @@ +/* + * Copyright (c) 2022, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef MTK_SIP_SVC_H +#define MTK_SIP_SVC_H + +#include <stdint.h> +#include <lib/smccc.h> +#include <mtk_sip_def.h> + +/* SMC function IDs for SiP Service queries */ +#define SIP_SVC_CALL_COUNT U(0x8200ff00) +#define SIP_SVC_UID U(0x8200ff01) +/* 0x8200ff02 is reserved */ +#define SIP_SVC_VERSION U(0x8200ff03) + +/* MediaTek SiP Service Calls version numbers */ +#define MTK_SIP_SVC_VERSION_MAJOR U(0x0) +#define MTK_SIP_SVC_VERSION_MINOR U(0x1) + +/* Number of MediaTek SiP Calls implemented */ +#define MTK_COMMON_SIP_NUM_CALLS U(4) + +/* MediaTek SiP Service Calls function IDs */ +#define MTK_SIP_SET_AUTHORIZED_SECURE_REG U(0x82000001) + +#define SMC_ID_EXPAND_AS_ENUM(_smc_id, _smc_num) \ + _smc_id##_AARCH32 = ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT) | \ + ((0) << FUNCID_CC_SHIFT) | \ + (OEN_SIP_START << FUNCID_OEN_SHIFT) | \ + ((_smc_num) << FUNCID_NUM_SHIFT)), \ + _smc_id##_AARCH64 = ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT) | \ + ((1) << FUNCID_CC_SHIFT) | \ + (OEN_SIP_START << FUNCID_OEN_SHIFT) | \ + ((_smc_num) << FUNCID_NUM_SHIFT)), + +#define SMC_ID_EXPAND_AS_EXTERN_SMC_INDEX(_smc_id, _smc_num) \ + extern short _smc_id##_descriptor_index; + +/* Bind SMC handler with SMC ID */ +#define DECLARE_SMC_HANDLER(_smc_id, _smc_handler) \ + const struct smc_descriptor _smc_id##_descriptor \ + __used \ + __aligned(sizeof(void *)) \ + __section(".mtk_smc_descriptor_pool") = { \ + .smc_handler = _smc_handler, \ + .smc_name = #_smc_id, \ + .smc_id_aarch32 = _smc_id##_AARCH32, \ + .smc_id_aarch64 = _smc_id##_AARCH64, \ + .smc_descriptor_index = &_smc_id##_descriptor_index \ + } + +MTK_SIP_SMC_FROM_BL33_TABLE(SMC_ID_EXPAND_AS_EXTERN_SMC_INDEX); +MTK_SIP_SMC_FROM_NS_EL1_TABLE(SMC_ID_EXPAND_AS_EXTERN_SMC_INDEX); + +/* Expand SiP SMC ID table as enum */ +enum { + MTK_SIP_SMC_FROM_BL33_TABLE(SMC_ID_EXPAND_AS_ENUM) + MTK_SIP_SMC_FROM_NS_EL1_TABLE(SMC_ID_EXPAND_AS_ENUM) + MTK_SIP_SMC_MAX_NUMBER +}; + +/* MediaTek SiP Calls error code */ +enum { + MTK_SIP_E_SUCCESS = 0, + MTK_SIP_E_INVALID_PARAM = -1, + MTK_SIP_E_NOT_SUPPORTED = -2, + MTK_SIP_E_INVALID_RANGE = -3, + MTK_SIP_E_PERMISSION_DENY = -4, + MTK_SIP_E_LOCK_FAIL = -5, +}; + +struct smccc_res { + uint64_t a1; + uint64_t a2; + uint64_t a3; +}; + +typedef uintptr_t (*smc_handler_t)(u_register_t, + u_register_t, + u_register_t, + u_register_t, + void *, + struct smccc_res *); + +struct smc_descriptor { + smc_handler_t smc_handler; + const uint32_t smc_id_aarch32; + const uint32_t smc_id_aarch64; + const char *smc_name; + short *const smc_descriptor_index; +}; + +/* + * This function should be implemented in MediaTek SOC directory. It fullfills + * MTK_SIP_SET_AUTHORIZED_SECURE_REG SiP call by checking the sreg with the + * predefined secure register list, if a match was found, set val to sreg. + * + * Return MTK_SIP_E_SUCCESS on success, and MTK_SIP_E_INVALID_PARAM on failure. + */ +uint64_t mt_sip_set_authorized_sreg(uint32_t sreg, uint32_t val); + +#endif /* MTK_SIP_SVC_H */ diff --git a/plat/mediatek/include/plat.ld.rodata.inc b/plat/mediatek/include/plat.ld.rodata.inc new file mode 100644 index 0000000..06ad491 --- /dev/null +++ b/plat/mediatek/include/plat.ld.rodata.inc @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2022, MediaTek Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef PLAT_LD_RODATA_INC +#define PLAT_LD_RODATA_INC + +#include <lib/mtk_init/mtk_init.h> + . = ALIGN(32); + INIT_CALL_TABLE(EXPAND_AS_LINK_SECTION); + __MTK_PLAT_INITCALL_END__ = .; + . = ALIGN(32); + __MTK_MMAP_POINTER_POOL_START__ = .; + KEEP(*(.mtk_mmap_pool)) + __MTK_MMAP_POINTER_POOL_END_UNALIGNED__ = .; + . = ALIGN(8); + __MTK_MMAP_POOL_START__ = .; + KEEP(*(.mtk_mmap_lists)) + __MTK_MMAP_POOL_END_UNALIGNED__ = .; + . = ALIGN(32); + __MTK_SMC_POOL_START__ = .; + KEEP(*(.mtk_smc_descriptor_pool)) + __MTK_SMC_POOL_END_UNALIGNED__ = .; + . = ALIGN(8); +#include <vendor_pubsub_events.h> + *(mtk_plat_ro) + +#endif /* PLAT_LD_RODATA_INC */ diff --git a/plat/mediatek/include/vendor_pubsub_events.h b/plat/mediatek/include/vendor_pubsub_events.h new file mode 100644 index 0000000..cb8d878 --- /dev/null +++ b/plat/mediatek/include/vendor_pubsub_events.h @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2022, MediaTek Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef VENDOR_PUBSUB_EVENTS_H +#define VENDOR_PUBSUB_EVENTS_H + +#include <lib/el3_runtime/pubsub.h> + +REGISTER_PUBSUB_EVENT(lpm_publish_event); +REGISTER_PUBSUB_EVENT(suspend_publish_event); +REGISTER_PUBSUB_EVENT(mt_cpupm_publish_pwr_on); +REGISTER_PUBSUB_EVENT(mt_cpupm_publish_pwr_off); +REGISTER_PUBSUB_EVENT(mt_cpupm_publish_afflv_pwr_on); +REGISTER_PUBSUB_EVENT(mt_cpupm_publish_afflv_pwr_off); +REGISTER_PUBSUB_EVENT(publish_check_wakeup_irq); +REGISTER_PUBSUB_EVENT(watchdog_timeout); + +#endif /* VENDOR_PUBSUB_EVENTS_H */ |