2 files changed, 86 insertions, 0 deletions
diff --git a/plat/mediatek/mt8173/drivers/rtc/rtc.c b/plat/mediatek/mt8173/drivers/rtc/rtc.c
new file mode 100644
index 0000000..587886c
--- /dev/null
+++ b/plat/mediatek/mt8173/drivers/rtc/rtc.c
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <assert.h>
+#include <common/debug.h>
+
+#include <mt8173_def.h>
+#include <rtc.h>
+
+void rtc_bbpu_power_down(void)
+{
+	uint16_t bbpu;
+
+	/* pull PWRBB low */
+	bbpu = RTC_BBPU_KEY | RTC_BBPU_AUTO | RTC_BBPU_PWREN;
+	if (Writeif_unlock()) {
+		RTC_Write(RTC_BBPU, bbpu);
+		if (!RTC_Write_Trigger())
+			assert(0);
+	} else {
+		assert(0);
+	}
+}
diff --git a/plat/mediatek/mt8173/drivers/rtc/rtc.h b/plat/mediatek/mt8173/drivers/rtc/rtc.h
new file mode 100644
index 0000000..f60a4c1
--- /dev/null
+++ b/plat/mediatek/mt8173/drivers/rtc/rtc.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef RTC_H
+#define RTC_H
+
+/* RTC registers */
+enum {
+	RTC_BBPU = 0xE000,
+	RTC_IRQ_STA = 0xE002,
+	RTC_IRQ_EN = 0xE004,
+	RTC_CII_EN = 0xE006
+};
+
+enum {
+	RTC_OSC32CON = 0xE026,
+	RTC_CON = 0xE03E,
+	RTC_WRTGR = 0xE03C
+};
+
+enum {
+	RTC_PDN1 = 0xE02C,
+	RTC_PDN2 = 0xE02E,
+	RTC_SPAR0 = 0xE030,
+	RTC_SPAR1 = 0xE032,
+	RTC_PROT = 0xE036,
+	RTC_DIFF = 0xE038,
+	RTC_CALI = 0xE03A
+};
+
+enum {
+	RTC_PROT_UNLOCK1 = 0x586A,
+	RTC_PROT_UNLOCK2 = 0x9136
+};
+
+enum {
+	RTC_BBPU_PWREN	= 1U << 0,
+	RTC_BBPU_BBPU	= 1U << 2,
+	RTC_BBPU_AUTO	= 1U << 3,
+	RTC_BBPU_CLRPKY	= 1U << 4,
+	RTC_BBPU_RELOAD	= 1U << 5,
+	RTC_BBPU_CBUSY	= 1U << 6
+};
+
+enum {
+	RTC_BBPU_KEY	= 0x43 << 8
+};
+
+/* external API */
+uint16_t RTC_Read(uint32_t addr);
+void RTC_Write(uint32_t addr, uint16_t data);
+int32_t rtc_busy_wait(void);
+int32_t RTC_Write_Trigger(void);
+int32_t Writeif_unlock(void);
+void rtc_bbpu_power_down(void);
+
+#endif /* RTC_H */