From 102b0d2daa97dae68d3eed54d8fe37a9cc38a892 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sun, 28 Apr 2024 11:13:47 +0200 Subject: Adding upstream version 2.8.0+dfsg. Signed-off-by: Daniel Baumann --- include/drivers/nxp/smmu/nxp_smmu.h | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 include/drivers/nxp/smmu/nxp_smmu.h (limited to 'include/drivers/nxp/smmu/nxp_smmu.h') diff --git a/include/drivers/nxp/smmu/nxp_smmu.h b/include/drivers/nxp/smmu/nxp_smmu.h new file mode 100644 index 0000000..d64c33b --- /dev/null +++ b/include/drivers/nxp/smmu/nxp_smmu.h @@ -0,0 +1,30 @@ +/* + * Copyright 2018-2020 NXP + * + * SPDX-License-Identifier: BSD-3-Clause + * + */ + +#ifndef NXP_SMMU_H +#define NXP_SMMU_H + +#define SMMU_SCR0 (0x0) +#define SMMU_NSCR0 (0x400) + +#define SCR0_CLIENTPD_MASK 0x00000001 +#define SCR0_USFCFG_MASK 0x00000400 + +static inline void bypass_smmu(uintptr_t smmu_base_addr) +{ + uint32_t val; + + val = (mmio_read_32(smmu_base_addr + SMMU_SCR0) | SCR0_CLIENTPD_MASK) & + ~(SCR0_USFCFG_MASK); + mmio_write_32((smmu_base_addr + SMMU_SCR0), val); + + val = (mmio_read_32(smmu_base_addr + SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & + ~(SCR0_USFCFG_MASK); + mmio_write_32((smmu_base_addr + SMMU_NSCR0), val); +} + +#endif -- cgit v1.2.3