From 102b0d2daa97dae68d3eed54d8fe37a9cc38a892 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sun, 28 Apr 2024 11:13:47 +0200 Subject: Adding upstream version 2.8.0+dfsg. Signed-off-by: Daniel Baumann --- include/plat/arm/css/common/css_pm.h | 64 ++++++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 include/plat/arm/css/common/css_pm.h (limited to 'include/plat/arm/css/common/css_pm.h') diff --git a/include/plat/arm/css/common/css_pm.h b/include/plat/arm/css/common/css_pm.h new file mode 100644 index 0000000..84e6b38 --- /dev/null +++ b/include/plat/arm/css/common/css_pm.h @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2015-2022, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef CSS_PM_H +#define CSS_PM_H + +#include +#include + +#include + +/* SGI used to trigger per-core power down request */ +#define CSS_CPU_PWR_DOWN_REQ_INTR ARM_IRQ_SEC_SGI_7 + +/* Macros to read the CSS power domain state */ +#define CSS_CORE_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL0] +#define CSS_CLUSTER_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL1] + +static inline unsigned int css_system_pwr_state(const psci_power_state_t *state) +{ +#if (PLAT_MAX_PWR_LVL == CSS_SYSTEM_PWR_DMN_LVL) + return state->pwr_domain_state[CSS_SYSTEM_PWR_DMN_LVL]; +#else + return 0; +#endif +} + +int css_pwr_domain_on(u_register_t mpidr); +void css_pwr_domain_on_finish(const psci_power_state_t *target_state); +void css_pwr_domain_on_finish_late(const psci_power_state_t *target_state); +void css_pwr_domain_off(const psci_power_state_t *target_state); +void css_pwr_domain_suspend(const psci_power_state_t *target_state); +void css_pwr_domain_suspend_finish( + const psci_power_state_t *target_state); +void __dead2 css_system_off(void); +void __dead2 css_system_reset(void); +void css_cpu_standby(plat_local_state_t cpu_state); +void css_get_sys_suspend_power_state(psci_power_state_t *req_state); +int css_node_hw_state(u_register_t mpidr, unsigned int power_level); +void css_setup_cpu_pwr_down_intr(void); +int css_reboot_interrupt_handler(uint32_t intr_raw, uint32_t flags, + void *handle, void *cookie); + +/* + * This mapping array has to be exported by the platform. Each element at + * a given index maps that core to an SCMI power domain. + */ +extern const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[]; + +#define SCMI_DOMAIN_ID_MASK U(0xFFFF) +#define SCMI_CHANNEL_ID_MASK U(0xFFFF) +#define SCMI_CHANNEL_ID_SHIFT U(16) + +#define SET_SCMI_CHANNEL_ID(n) (((n) & SCMI_CHANNEL_ID_MASK) << \ + SCMI_CHANNEL_ID_SHIFT) +#define SET_SCMI_DOMAIN_ID(n) ((n) & SCMI_DOMAIN_ID_MASK) +#define GET_SCMI_CHANNEL_ID(n) (((n) >> SCMI_CHANNEL_ID_SHIFT) & \ + SCMI_CHANNEL_ID_MASK) +#define GET_SCMI_DOMAIN_ID(n) ((n) & SCMI_DOMAIN_ID_MASK) + +#endif /* CSS_PM_H */ -- cgit v1.2.3