From 102b0d2daa97dae68d3eed54d8fe37a9cc38a892 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sun, 28 Apr 2024 11:13:47 +0200 Subject: Adding upstream version 2.8.0+dfsg. Signed-off-by: Daniel Baumann --- plat/imx/common/imx7_clock.c | 55 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 plat/imx/common/imx7_clock.c (limited to 'plat/imx/common/imx7_clock.c') diff --git a/plat/imx/common/imx7_clock.c b/plat/imx/common/imx7_clock.c new file mode 100644 index 0000000..6bd2e0e --- /dev/null +++ b/plat/imx/common/imx7_clock.c @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#include +#include + +static void imx7_clock_uart_init(void) +{ + unsigned int i; + + for (i = 0; i < MXC_MAX_UART_NUM; i++) + imx_clock_disable_uart(i); +} + +static void imx7_clock_wdog_init(void) +{ + unsigned int i; + + for (i = 0; i < MXC_MAX_WDOG_NUM; i++) + imx_clock_disable_wdog(i); +} + +static void imx7_clock_usb_init(void) +{ + /* Disable the clock root */ + imx_clock_target_clr(CCM_TRT_ID_USB_HSIC_CLK_ROOT, 0xFFFFFFFF); +} + +void imx_clock_init(void) +{ + /* + * The BootROM hands off to the next stage with the internal 24 MHz XTAL + * crystal already clocking the main PLL, which is very handy. + * Here we should enable whichever peripherals are required for ATF and + * OPTEE. + * + * Subsequent stages in the boot process such as u-boot and Linux + * already have a significant and mature code-base around clocks, so our + * objective should be to enable what we need for ATF/OPTEE without + * breaking any existing upstream code in Linux and u-boot. + */ + + /* Initialize UART clocks */ + imx7_clock_uart_init(); + + /* Watchdog clocks */ + + imx7_clock_wdog_init(); + + /* USB clocks */ + imx7_clock_usb_init(); + +} -- cgit v1.2.3