From 102b0d2daa97dae68d3eed54d8fe37a9cc38a892 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sun, 28 Apr 2024 11:13:47 +0200 Subject: Adding upstream version 2.8.0+dfsg. Signed-off-by: Daniel Baumann --- plat/mediatek/mt8186/include/plat_uart.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 plat/mediatek/mt8186/include/plat_uart.h (limited to 'plat/mediatek/mt8186/include/plat_uart.h') diff --git a/plat/mediatek/mt8186/include/plat_uart.h b/plat/mediatek/mt8186/include/plat_uart.h new file mode 100644 index 0000000..f0fb442 --- /dev/null +++ b/plat/mediatek/mt8186/include/plat_uart.h @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2022, MediaTek Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef __PLAT_UART_H__ +#define __PLAT_UART_H__ + +/* UART error code */ +#define UART_DONE U(0) +#define UART_PM_ERROR U(1) + +/* UART HW information */ +#ifndef HW_SUPPORT_UART_PORTS +#define HW_SUPPORT_UART_PORTS (2U) /* the UART PORTs current HW have */ +#endif +#define MTK_UART_SEND_SLEEP_REQ (1U) /* Request uart to sleep */ +#define MTK_UART_SLEEP_ACK_IDLE (1U) /* uart in idle state */ +#define MTK_UART_WAIT_ACK_TIMES (50U) + +#define UART_BASE0 (0x11002000) +#define UART_BASE1 (0x11003000) + +#endif /* __PLAT_UART_H__ */ -- cgit v1.2.3