From 102b0d2daa97dae68d3eed54d8fe37a9cc38a892 Mon Sep 17 00:00:00 2001
From: Daniel Baumann <daniel.baumann@progress-linux.org>
Date: Sun, 28 Apr 2024 11:13:47 +0200
Subject: Adding upstream version 2.8.0+dfsg.

Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
---
 plat/nvidia/tegra/soc/t186/plat_trampoline.S | 41 ++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)
 create mode 100644 plat/nvidia/tegra/soc/t186/plat_trampoline.S

(limited to 'plat/nvidia/tegra/soc/t186/plat_trampoline.S')

diff --git a/plat/nvidia/tegra/soc/t186/plat_trampoline.S b/plat/nvidia/tegra/soc/t186/plat_trampoline.S
new file mode 100644
index 0000000..2fc2046
--- /dev/null
+++ b/plat/nvidia/tegra/soc/t186/plat_trampoline.S
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <arch.h>
+#include <asm_macros.S>
+#include <common/bl_common.h>
+#include <memctrl_v2.h>
+#include <plat/common/common_def.h>
+#include <tegra_def.h>
+
+#define TEGRA186_MC_CTX_SIZE		0x93
+
+	.globl tegra186_get_mc_ctx_size
+
+	/*
+	 * Tegra186 reset data (offset 0x0 - 0x420)
+	 *
+	 * 0x000: MC context start
+	 * 0x420: MC context end
+	 */
+
+	.align 4
+__tegra186_mc_context:
+	.rept	TEGRA186_MC_CTX_SIZE
+	.quad	0
+	.endr
+
+	.align 4
+__tegra186_mc_context_end:
+
+/* return the size of the MC context */
+func tegra186_get_mc_ctx_size
+	adr	x0, __tegra186_mc_context_end
+	adr	x1, __tegra186_mc_context
+	sub	x0, x0, x1
+	ret
+endfunc tegra186_get_mc_ctx_size
-- 
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