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/*
* Copyright (c) 2019-2021, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: MIT
*
* This header provides constants for the ARM GIC.
*/
#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
#include <dt-bindings/interrupt-controller/irq.h>
/* interrupt specifier cell 0 */
#define GIC_SPI 0
#define GIC_PPI 1
/*
* Interrupt specifier cell 2.
* The flags in irq.h are valid, plus those below.
*/
#define GIC_CPU_MASK_RAW(x) ((x) << 8)
#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1)
#endif
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