blob: 2c724631d26768a3e0c1de95ae071b06e54ab924 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
|
/*
* Copyright (c) 2019, Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef CAD_WATCHDOG_H
#define CAD_WATCHDOG_H
#define WDT_BASE (0xFFD00200)
#define WDT_REG_SIZE_OFFSET (0x4)
#define WDT_MIN_CYCLES (65536)
#define WDT_PERIOD (20)
#define WDT_CR (WDT_BASE + 0x0)
#define WDT_TORR (WDT_BASE + 0x4)
#define WDT_CRR (WDT_BASE + 0xC)
#define WDT_CCVR (WDT_BASE + 0x8)
#define WDT_STAT (WDT_BASE + 0x10)
#define WDT_EOI (WDT_BASE + 0x14)
#define WDT_COMP_PARAM_1 (WDT_BASE + 0xF4)
#define WDT_COMP_VERSION (WDT_BASE + 0xF8)
#define WDT_COMP_TYPE (WDT_BASE + 0XFC)
#define WDT_CR_RMOD (0x0)
#define WDT_CR_EN (0x1)
#define WDT_SW_RST (0x76)
void watchdog_init(int watchdog_clk);
void watchdog_info(void);
void watchdog_status(void);
void watchdog_sw_rst(void);
#endif
|
