diff options
Diffstat (limited to '')
-rw-r--r-- | intel/intel-symbols.txt | 83 |
1 files changed, 83 insertions, 0 deletions
diff --git a/intel/intel-symbols.txt b/intel/intel-symbols.txt new file mode 100644 index 0000000..132df96 --- /dev/null +++ b/intel/intel-symbols.txt @@ -0,0 +1,83 @@ +drm_intel_bo_alloc +drm_intel_bo_alloc_for_render +drm_intel_bo_alloc_tiled +drm_intel_bo_alloc_userptr +drm_intel_bo_busy +drm_intel_bo_disable_reuse +drm_intel_bo_emit_reloc +drm_intel_bo_emit_reloc_fence +drm_intel_bo_exec +drm_intel_bo_fake_alloc_static +drm_intel_bo_fake_disable_backing_store +drm_intel_bo_flink +drm_intel_bo_gem_create_from_name +drm_intel_bo_gem_create_from_prime +drm_intel_bo_gem_export_to_prime +drm_intel_bo_get_subdata +drm_intel_bo_get_tiling +drm_intel_bo_is_reusable +drm_intel_bo_madvise +drm_intel_bo_map +drm_intel_bo_mrb_exec +drm_intel_bo_pin +drm_intel_bo_reference +drm_intel_bo_references +drm_intel_bo_set_softpin_offset +drm_intel_bo_set_tiling +drm_intel_bo_subdata +drm_intel_bo_unmap +drm_intel_bo_unpin +drm_intel_bo_unreference +drm_intel_bo_use_48b_address_range +drm_intel_bo_wait_rendering +drm_intel_bufmgr_check_aperture_space +drm_intel_bufmgr_destroy +drm_intel_bufmgr_fake_contended_lock_take +drm_intel_bufmgr_fake_evict_all +drm_intel_bufmgr_fake_init +drm_intel_bufmgr_fake_set_exec_callback +drm_intel_bufmgr_fake_set_fence_callback +drm_intel_bufmgr_fake_set_last_dispatch +drm_intel_bufmgr_gem_can_disable_implicit_sync +drm_intel_bufmgr_gem_enable_fenced_relocs +drm_intel_bufmgr_gem_enable_reuse +drm_intel_bufmgr_gem_get_devid +drm_intel_bufmgr_gem_init +drm_intel_bufmgr_gem_set_aub_annotations +drm_intel_bufmgr_gem_set_aub_dump +drm_intel_bufmgr_gem_set_aub_filename +drm_intel_bufmgr_gem_set_vma_cache_size +drm_intel_bufmgr_set_debug +drm_intel_decode +drm_intel_decode_context_alloc +drm_intel_decode_context_free +drm_intel_decode_set_batch_pointer +drm_intel_decode_set_dump_past_end +drm_intel_decode_set_head_tail +drm_intel_decode_set_output_file +drm_intel_gem_bo_aub_dump_bmp +drm_intel_gem_bo_clear_relocs +drm_intel_gem_bo_context_exec +drm_intel_gem_bo_disable_implicit_sync +drm_intel_gem_bo_enable_implicit_sync +drm_intel_gem_bo_fence_exec +drm_intel_gem_bo_get_reloc_count +drm_intel_gem_bo_map__cpu +drm_intel_gem_bo_map__gtt +drm_intel_gem_bo_map__wc +drm_intel_gem_bo_map_gtt +drm_intel_gem_bo_map_unsynchronized +drm_intel_gem_bo_start_gtt_access +drm_intel_gem_bo_unmap_gtt +drm_intel_gem_bo_wait +drm_intel_gem_context_create +drm_intel_gem_context_destroy +drm_intel_gem_context_get_id +drm_intel_get_aperture_sizes +drm_intel_get_eu_total +drm_intel_get_min_eu_in_pool +drm_intel_get_pipe_from_crtc_id +drm_intel_get_pooled_eu +drm_intel_get_reset_stats +drm_intel_get_subslice_total +drm_intel_reg_read |