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| author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-29 04:40:20 +0000 |
|---|---|---|
| committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-29 04:40:20 +0000 |
| commit | 2dba2525fb35dcfc79aad5bdf6c92e790d69635c (patch) | |
| tree | ac8ac7d3960922094733bac6d9a5300da7171c56 /doc/man/nvme_io_dsm_flags.2 | |
| parent | Initial commit. (diff) | |
| download | libnvme-2dba2525fb35dcfc79aad5bdf6c92e790d69635c.tar.xz libnvme-2dba2525fb35dcfc79aad5bdf6c92e790d69635c.zip | |
Adding upstream version 1.3.upstream/1.3upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'doc/man/nvme_io_dsm_flags.2')
| -rw-r--r-- | doc/man/nvme_io_dsm_flags.2 | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/doc/man/nvme_io_dsm_flags.2 b/doc/man/nvme_io_dsm_flags.2 new file mode 100644 index 0000000..700a615 --- /dev/null +++ b/doc/man/nvme_io_dsm_flags.2 @@ -0,0 +1,96 @@ +.TH "libnvme" 9 "enum nvme_io_dsm_flags" "January 2023" "API Manual" LINUX +.SH NAME +enum nvme_io_dsm_flags \- Dataset Management flags +.SH SYNOPSIS +enum nvme_io_dsm_flags { +.br +.BI " NVME_IO_DSM_FREQ_UNSPEC" +, +.br +.br +.BI " NVME_IO_DSM_FREQ_TYPICAL" +, +.br +.br +.BI " NVME_IO_DSM_FREQ_RARE" +, +.br +.br +.BI " NVME_IO_DSM_FREQ_READS" +, +.br +.br +.BI " NVME_IO_DSM_FREQ_WRITES" +, +.br +.br +.BI " NVME_IO_DSM_FREQ_RW" +, +.br +.br +.BI " NVME_IO_DSM_FREQ_ONCE" +, +.br +.br +.BI " NVME_IO_DSM_FREQ_PREFETCH" +, +.br +.br +.BI " NVME_IO_DSM_FREQ_TEMP" +, +.br +.br +.BI " NVME_IO_DSM_LATENCY_NONE" +, +.br +.br +.BI " NVME_IO_DSM_LATENCY_IDLE" +, +.br +.br +.BI " NVME_IO_DSM_LATENCY_NORM" +, +.br +.br +.BI " NVME_IO_DSM_LATENCY_LOW" +, +.br +.br +.BI " NVME_IO_DSM_SEQ_REQ" +, +.br +.br +.BI " NVME_IO_DSM_COMPRESSED" + +}; +.SH Constants +.IP "NVME_IO_DSM_FREQ_UNSPEC" 12 +No frequency information provided +.IP "NVME_IO_DSM_FREQ_TYPICAL" 12 +Typical number of reads and writes +expected for this LBA range +.IP "NVME_IO_DSM_FREQ_RARE" 12 +Infrequent writes and infrequent +reads to the LBA range indicated +.IP "NVME_IO_DSM_FREQ_READS" 12 +Infrequent writes and frequent +reads to the LBA range indicated +.IP "NVME_IO_DSM_FREQ_WRITES" 12 +Frequent writes and infrequent +reads to the LBA range indicated +.IP "NVME_IO_DSM_FREQ_RW" 12 +Frequent writes and frequent reads +to the LBA range indicated +.IP "NVME_IO_DSM_FREQ_ONCE" 12 +.IP "NVME_IO_DSM_FREQ_PREFETCH" 12 +.IP "NVME_IO_DSM_FREQ_TEMP" 12 +.IP "NVME_IO_DSM_LATENCY_NONE" 12 +No latency information provided +.IP "NVME_IO_DSM_LATENCY_IDLE" 12 +Longer latency acceptable +.IP "NVME_IO_DSM_LATENCY_NORM" 12 +Typical latency +.IP "NVME_IO_DSM_LATENCY_LOW" 12 +Smallest possible latency +.IP "NVME_IO_DSM_SEQ_REQ" 12 +.IP "NVME_IO_DSM_COMPRESSED" 12 |