summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-imx/mach-imx6sl.c
diff options
context:
space:
mode:
authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-07 18:49:45 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-07 18:49:45 +0000
commit2c3c1048746a4622d8c89a29670120dc8fab93c4 (patch)
tree848558de17fb3008cdf4d861b01ac7781903ce39 /arch/arm/mach-imx/mach-imx6sl.c
parentInitial commit. (diff)
downloadlinux-2c3c1048746a4622d8c89a29670120dc8fab93c4.tar.xz
linux-2c3c1048746a4622d8c89a29670120dc8fab93c4.zip
Adding upstream version 6.1.76.upstream/6.1.76
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'arch/arm/mach-imx/mach-imx6sl.c')
-rw-r--r--arch/arm/mach-imx/mach-imx6sl.c82
1 files changed, 82 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mach-imx6sl.c b/arch/arm/mach-imx/mach-imx6sl.c
new file mode 100644
index 000000000..f6e87363d
--- /dev/null
+++ b/arch/arm/mach-imx/mach-imx6sl.c
@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ */
+
+#include <linux/irqchip.h>
+#include <linux/of_platform.h>
+#include <linux/mfd/syscon.h>
+#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
+#include <linux/regmap.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include "common.h"
+#include "cpuidle.h"
+#include "hardware.h"
+
+static void __init imx6sl_fec_init(void)
+{
+ struct regmap *gpr;
+
+ /* set FEC clock from internal PLL clock source */
+ gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sl-iomuxc-gpr");
+ if (!IS_ERR(gpr)) {
+ regmap_update_bits(gpr, IOMUXC_GPR1,
+ IMX6SL_GPR1_FEC_CLOCK_MUX2_SEL_MASK, 0);
+ regmap_update_bits(gpr, IOMUXC_GPR1,
+ IMX6SL_GPR1_FEC_CLOCK_MUX1_SEL_MASK, 0);
+ } else {
+ pr_err("failed to find fsl,imx6sl-iomux-gpr regmap\n");
+ }
+}
+
+static void __init imx6sl_init_late(void)
+{
+ /* imx6sl reuses imx6q cpufreq driver */
+ if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
+ platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
+
+ if (IS_ENABLED(CONFIG_SOC_IMX6SL) && cpu_is_imx6sl())
+ imx6sl_cpuidle_init();
+ else if (IS_ENABLED(CONFIG_SOC_IMX6SLL))
+ imx6sx_cpuidle_init();
+}
+
+static void __init imx6sl_init_machine(void)
+{
+ of_platform_default_populate(NULL, NULL, NULL);
+
+ if (cpu_is_imx6sl())
+ imx6sl_fec_init();
+ imx_anatop_init();
+ imx6sl_pm_init();
+}
+
+static void __init imx6sl_init_irq(void)
+{
+ imx_gpc_check_dt();
+ imx_init_revision_from_anatop();
+ imx_init_l2cache();
+ imx_src_init();
+ irqchip_init();
+ if (cpu_is_imx6sl())
+ imx6_pm_ccm_init("fsl,imx6sl-ccm");
+ else
+ imx6_pm_ccm_init("fsl,imx6sll-ccm");
+}
+
+static const char * const imx6sl_dt_compat[] __initconst = {
+ "fsl,imx6sl",
+ "fsl,imx6sll",
+ NULL,
+};
+
+DT_MACHINE_START(IMX6SL, "Freescale i.MX6 SoloLite (Device Tree)")
+ .l2c_aux_val = 0,
+ .l2c_aux_mask = ~0,
+ .init_irq = imx6sl_init_irq,
+ .init_machine = imx6sl_init_machine,
+ .init_late = imx6sl_init_late,
+ .dt_compat = imx6sl_dt_compat,
+MACHINE_END