diff options
Diffstat (limited to '')
| -rw-r--r-- | arch/powerpc/boot/dts/ep8248e.dts | 199 |
1 files changed, 199 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/ep8248e.dts b/arch/powerpc/boot/dts/ep8248e.dts new file mode 100644 index 000000000..9ae2d92f5 --- /dev/null +++ b/arch/powerpc/boot/dts/ep8248e.dts @@ -0,0 +1,199 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Device Tree for the Embedded Planet EP8248E board running PlanetCore. + * + * Copyright 2007 Freescale Semiconductor Inc. + */ + +/dts-v1/; +/ { + model = "EP8248E"; + compatible = "fsl,ep8248e"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + planetcore-SMC1 = &smc1; + planetcore-SCC1 = &scc1; + ethernet0 = ð0; + ethernet1 = ð1; + serial0 = &smc1; + serial1 = &scc1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8248@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <32>; + i-cache-line-size = <32>; + d-cache-size = <16384>; + i-cache-size = <16384>; + timebase-frequency = <0>; + clock-frequency = <0>; + }; + }; + + localbus@f0010100 { + compatible = "fsl,mpc8248-localbus", + "fsl,pq2-localbus", + "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0xf0010100 0x40>; + + ranges = <0 0 0xfc000000 0x04000000 + 1 0 0xfa000000 0x00008000>; + + flash@0,3800000 { + compatible = "cfi-flash"; + reg = <0 0x3800000 0x800000>; + bank-width = <4>; + device-width = <2>; + }; + + bcsr@1,0 { + #address-cells = <2>; + #size-cells = <1>; + reg = <1 0 0x10>; + compatible = "fsl,ep8248e-bcsr"; + ranges; + + mdio { + compatible = "fsl,ep8248e-mdio-bitbang"; + #address-cells = <1>; + #size-cells = <0>; + reg = <1 8 1>; + + PHY0: ethernet-phy@0 { + interrupt-parent = <&PIC>; + reg = <0>; + }; + + PHY1: ethernet-phy@1 { + interrupt-parent = <&PIC>; + reg = <1>; + }; + }; + }; + }; + + memory { + device_type = "memory"; + reg = <0 0>; + }; + + soc@f0000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8248-immr", "fsl,pq2-soc", "simple-bus"; + ranges = <0x00000000 0xf0000000 0x00053000>; + + // Temporary until code stops depending on it. + device_type = "soc"; + + // Temporary -- will go away once kernel uses ranges for get_immrbase(). + reg = <0xf0000000 0x00053000>; + + cpm@119c0 { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + compatible = "fsl,mpc8248-cpm", "fsl,cpm2", + "simple-bus"; + reg = <0x119c0 0x30>; + ranges; + + muram { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x10000>; + + data@0 { + compatible = "fsl,cpm-muram-data"; + reg = <0 0x2000 0x9800 0x800>; + }; + }; + + brg@119f0 { + compatible = "fsl,mpc8248-brg", + "fsl,cpm2-brg", + "fsl,cpm-brg"; + reg = <0x119f0 0x10 0x115f0 0x10>; + }; + + /* Monitor port/SMC1 */ + smc1: serial@11a80 { + device_type = "serial"; + compatible = "fsl,mpc8248-smc-uart", + "fsl,cpm2-smc-uart"; + reg = <0x11a80 0x20 0x87fc 2>; + interrupts = <4 8>; + interrupt-parent = <&PIC>; + fsl,cpm-brg = <7>; + fsl,cpm-command = <0x1d000000>; + linux,planetcore-label = "SMC1"; + }; + + /* "Serial" port/SCC1 */ + scc1: serial@11a00 { + device_type = "serial"; + compatible = "fsl,mpc8248-scc-uart", + "fsl,cpm2-scc-uart"; + reg = <0x11a00 0x20 0x8000 0x100>; + interrupts = <40 8>; + interrupt-parent = <&PIC>; + fsl,cpm-brg = <1>; + fsl,cpm-command = <0x00800000>; + linux,planetcore-label = "SCC1"; + }; + + eth0: ethernet@11300 { + device_type = "network"; + compatible = "fsl,mpc8248-fcc-enet", + "fsl,cpm2-fcc-enet"; + reg = <0x11300 0x20 0x8400 0x100 0x11390 1>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <32 8>; + interrupt-parent = <&PIC>; + phy-handle = <&PHY0>; + linux,network-index = <0>; + fsl,cpm-command = <0x12000300>; + }; + + eth1: ethernet@11320 { + device_type = "network"; + compatible = "fsl,mpc8248-fcc-enet", + "fsl,cpm2-fcc-enet"; + reg = <0x11320 0x20 0x8500 0x100 0x113b0 1>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <33 8>; + interrupt-parent = <&PIC>; + phy-handle = <&PHY1>; + linux,network-index = <1>; + fsl,cpm-command = <0x16200300>; + }; + + usb@11b60 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc8248-usb", + "fsl,cpm2-usb"; + reg = <0x11b60 0x18 0x8b00 0x100>; + interrupt-parent = <&PIC>; + interrupts = <11 8>; + fsl,cpm-command = <0x2e600000>; + }; + }; + + PIC: interrupt-controller@10c00 { + #interrupt-cells = <2>; + interrupt-controller; + reg = <0x10c00 0x80>; + compatible = "fsl,mpc8248-pic", "fsl,pq2-pic"; + }; + }; +}; |