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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-28 09:24:33 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-28 09:24:33 +0000
commit7a19c99f661602b67db95fd1d8aca5fe3a387441 (patch)
tree215ff04ec522779fa83acf394d296c2356c6b382 /tests/cap-dpc
parentInitial commit. (diff)
downloadpciutils-7a19c99f661602b67db95fd1d8aca5fe3a387441.tar.xz
pciutils-7a19c99f661602b67db95fd1d8aca5fe3a387441.zip
Adding upstream version 1:3.9.0.upstream/1%3.9.0upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'tests/cap-dpc')
-rw-r--r--tests/cap-dpc91
1 files changed, 91 insertions, 0 deletions
diff --git a/tests/cap-dpc b/tests/cap-dpc
new file mode 100644
index 0000000..abf37b5
--- /dev/null
+++ b/tests/cap-dpc
@@ -0,0 +1,91 @@
+05:01.0 Class 0604: Device 10b5:9716 (rev aa)
+ Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+ Latency: 0, Cache Line Size: 32 bytes
+ Interrupt: pin A routed to IRQ 46
+ NUMA node: 0
+ Bus: primary=05, secondary=06, subordinate=06, sec-latency=0
+ I/O behind bridge: 0000f000-00000fff
+ Memory behind bridge: c6c00000-c6ffffff
+ Prefetchable memory behind bridge: 0000383ff9c00000-0000383ff9ffffff
+ Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
+ BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
+ PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
+ Capabilities: [40] Power Management version 3
+ Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
+ Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
+ Capabilities: [48] MSI: Enable+ Count=1/8 Maskable+ 64bit+
+ Address: 00000000fee004d8 Data: 0000
+ Masking: 000000fe Pending: 00000000
+ Capabilities: [68] Express (v2) Downstream Port (Slot+), MSI 00
+ DevCap: MaxPayload 1024 bytes, PhantFunc 0
+ ExtTag- RBE+
+ DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
+ RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+
+ MaxPayload 128 bytes, MaxReadReq 128 bytes
+ DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
+ LnkCap: Port #1, Speed 8GT/s, Width x4, ASPM L1, Exit Latency L0s <4us, L1 <4us
+ ClockPM- Surprise+ LLActRep+ BwNot+ ASPMOptComp+
+ LnkCtl: ASPM Disabled; Disabled- CommClk-
+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
+ LnkSta: Speed 8GT/s, Width x4, TrErr- Train- SlotClk- DLActive+ BWMgmt+ ABWMgmt-
+ SltCap: AttnBtn- PwrCtrl+ MRL- AttnInd+ PwrInd+ HotPlug+ Surprise+
+ Slot #1, PowerLimit 25.000W; Interlock- NoCompl-
+ SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg+
+ Control: AttnInd Off, PwrInd On, Power- Interlock-
+ SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
+ Changed: MRL- PresDet- LinkState-
+ DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR+, OBFF Via message ARIFwd+
+ DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd+
+ LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
+ Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
+ Compliance De-emphasis: -6dB
+ LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete+, EqualizationPhase1+
+ EqualizationPhase2+, EqualizationPhase3+, LinkEqualizationRequest-
+ Capabilities: [a4] Subsystem: Device 10b5:9716
+ Capabilities: [100 v1] Device Serial Number 00-0e-df-10-b5-97-00-aa
+ Capabilities: [fb4 v1] Advanced Error Reporting
+ UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
+ UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
+ UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
+ CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
+ CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
+ AERCap: First Error Pointer: 1f, GenCap+ CGenEn- ChkCap+ ChkEn-
+ Capabilities: [138 v1] Power Budgeting <?>
+ Capabilities: [10c v1] #19
+ Capabilities: [148 v1] Virtual Channel
+ Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
+ Arb: Fixed- WRR32- WRR64- WRR128-
+ Ctrl: ArbSelect=Fixed
+ Status: InProgress-
+ VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
+ Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
+ Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01
+ Status: NegoPending- InProgress-
+ Capabilities: [f24 v1] Access Control Services
+ ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl+ DirectTrans+
+ ACSCtl: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl- DirectTrans-
+ Capabilities: [b70 v1] Vendor Specific Information: ID=0001 Rev=0 Len=010 <?>
+ Capabilities: [b60 v1] Downstream Port Containment
+ DpcCap: INT Msg #0, RPExt- PoisonedTLP+ SwTrigger+ RP PIO Log 0, DL_ActiveErr+
+ DpcCtl: Trigger:2 Cmpl+ INT+ ErrCor- PoisonedTLP- SwTrigger- DL_ActiveErr-
+ DpcSta: Trigger- Reason:00 INT- RPBusy- TriggerExt:00 RP PIO ErrPtr:00
+ Source: 0000
+ Kernel driver in use: pcieport
+00: b5 10 16 97 07 05 10 00 aa 00 04 06 08 00 01 00
+10: 00 00 00 00 00 00 00 00 05 06 06 00 f1 01 00 00
+20: c0 c6 f0 c6 c1 f9 f1 f9 3f 38 00 00 3f 38 00 00
+30: 00 00 00 00 40 00 00 00 00 00 00 00 0a 01 12 00
+40: 01 48 03 c8 08 00 00 00 05 68 87 01 d8 04 e0 fe
+50: 00 00 00 00 00 00 00 00 fe 00 00 00 00 00 00 00
+60: 00 00 00 00 00 00 00 00 10 a4 62 01 03 80 00 00
+70: 00 08 09 00 43 68 79 01 00 00 43 60 fa 0c 08 00
+80: f8 11 40 00 00 00 00 00 00 00 00 00 60 08 04 00
+90: 20 00 00 00 0e 0f 00 00 03 00 1e 00 00 00 00 00
+a0: 00 00 00 00 0d 00 00 00 b5 10 16 97 00 00 00 00
+b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+