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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-27 10:05:51 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-27 10:05:51 +0000 |
commit | 5d1646d90e1f2cceb9f0828f4b28318cd0ec7744 (patch) | |
tree | a94efe259b9009378be6d90eb30d2b019d95c194 /Documentation/devicetree/bindings/crypto/fsl-dcp.yaml | |
parent | Initial commit. (diff) | |
download | linux-5d1646d90e1f2cceb9f0828f4b28318cd0ec7744.tar.xz linux-5d1646d90e1f2cceb9f0828f4b28318cd0ec7744.zip |
Adding upstream version 5.10.209.upstream/5.10.209
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'Documentation/devicetree/bindings/crypto/fsl-dcp.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/crypto/fsl-dcp.yaml | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/crypto/fsl-dcp.yaml b/Documentation/devicetree/bindings/crypto/fsl-dcp.yaml new file mode 100644 index 000000000..a30bf38a4 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/fsl-dcp.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/fsl-dcp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale DCP (Data Co-Processor) found on i.MX23/i.MX28 + +maintainers: + - Marek Vasut <marex@denx.de> + +properties: + compatible: + enum: + - fsl,imx23-dcp + - fsl,imx28-dcp + + reg: + maxItems: 1 + + interrupts: + description: Should contain MXS DCP interrupt numbers, VMI IRQ and DCP IRQ + must be supplied, optionally Secure IRQ can be present, but is currently + not implemented and not used. + items: + - description: MXS DCP VMI interrupt + - description: MXS DCP DCP interrupt + - description: MXS DCP secure interrupt + minItems: 2 + maxItems: 3 + + clocks: + maxItems: 1 + + clock-names: + const: dcp + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + crypto@80028000 { + compatible = "fsl,imx23-dcp"; + reg = <0x80028000 0x2000>; + interrupts = <53>, <54>; + }; |