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Diffstat (limited to '')
| -rw-r--r-- | arch/arm/boot/dts/uniphier-ld6b-ref.dts | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/uniphier-ld6b-ref.dts b/arch/arm/boot/dts/uniphier-ld6b-ref.dts new file mode 100644 index 000000000..5bc7fe11b --- /dev/null +++ b/arch/arm/boot/dts/uniphier-ld6b-ref.dts @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +// +// Device Tree Source for UniPhier LD6b Reference Board +// +// Copyright (C) 2015-2016 Socionext Inc. +// Author: Masahiro Yamada <yamada.masahiro@socionext.com> + +/dts-v1/; +#include "uniphier-ld6b.dtsi" +#include "uniphier-ref-daughter.dtsi" +#include "uniphier-support-card.dtsi" + +/ { + model = "UniPhier LD6b Reference Board"; + compatible = "socionext,uniphier-ld6b-ref", "socionext,uniphier-ld6b"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serialsc; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + ethernet0 = ð + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x80000000>; + }; +}; + +ðsc { + interrupts = <4 8>; +}; + +&serialsc { + interrupts = <4 8>; +}; + +&serial0 { + status = "okay"; +}; + +&serial1 { + status = "okay"; +}; + +&serial2 { + status = "okay"; +}; + +&gpio { + xirq4 { + gpio-hog; + gpios = <UNIPHIER_GPIO_IRQ(4) 0>; + input; + }; +}; + +&i2c0 { + status = "okay"; +}; + +&sd { + status = "okay"; +}; + +ð { + status = "okay"; + phy-handle = <ðphy>; +}; + +&mdio { + ethphy: ethernet-phy@0 { + reg = <0>; + }; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; + +&nand { + status = "okay"; + + nand@0 { + reg = <0>; + }; +}; |