From 5d1646d90e1f2cceb9f0828f4b28318cd0ec7744 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sat, 27 Apr 2024 12:05:51 +0200 Subject: Adding upstream version 5.10.209. Signed-off-by: Daniel Baumann --- arch/arm/mach-orion5x/bridge-regs.h | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 arch/arm/mach-orion5x/bridge-regs.h (limited to 'arch/arm/mach-orion5x/bridge-regs.h') diff --git a/arch/arm/mach-orion5x/bridge-regs.h b/arch/arm/mach-orion5x/bridge-regs.h new file mode 100644 index 000000000..305598eaa --- /dev/null +++ b/arch/arm/mach-orion5x/bridge-regs.h @@ -0,0 +1,35 @@ +/* + * Orion CPU Bridge Registers + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_BRIDGE_REGS_H +#define __ASM_ARCH_BRIDGE_REGS_H + +#include "orion5x.h" + +#define CPU_CONF (ORION5X_BRIDGE_VIRT_BASE + 0x100) + +#define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE + 0x104) + +#define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x108) +#define RSTOUTn_MASK_PHYS (ORION5X_BRIDGE_PHYS_BASE + 0x108) + +#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE + 0x10c) + +#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x110) + +#define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE + 0x11C) + +#define BRIDGE_INT_TIMER1_CLR (~0x0004) + +#define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x200) + +#define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x204) + +#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE + 0x300) +#define TIMER_PHYS_BASE (ORION5X_BRIDGE_PHYS_BASE + 0x300) +#endif -- cgit v1.2.3