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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/allwinner,sun8i-h3-usb-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner H3 USB PHY Device Tree Bindings
maintainers:
- Chen-Yu Tsai <wens@csie.org>
- Maxime Ripard <mripard@kernel.org>
properties:
"#phy-cells":
const: 1
compatible:
const: allwinner,sun8i-h3-usb-phy
reg:
items:
- description: PHY Control registers
- description: PHY PMU0 registers
- description: PHY PMU1 registers
- description: PHY PMU2 registers
- description: PHY PMU3 registers
reg-names:
items:
- const: phy_ctrl
- const: pmu0
- const: pmu1
- const: pmu2
- const: pmu3
clocks:
items:
- description: USB OTG PHY bus clock
- description: USB Host 0 PHY bus clock
- description: USB Host 1 PHY bus clock
- description: USB Host 2 PHY bus clock
clock-names:
items:
- const: usb0_phy
- const: usb1_phy
- const: usb2_phy
- const: usb3_phy
resets:
items:
- description: USB OTG reset
- description: USB Host 1 Controller reset
- description: USB Host 2 Controller reset
- description: USB Host 3 Controller reset
reset-names:
items:
- const: usb0_reset
- const: usb1_reset
- const: usb2_reset
- const: usb3_reset
usb0_id_det-gpios:
description: GPIO to the USB OTG ID pin
usb0_vbus_det-gpios:
description: GPIO to the USB OTG VBUS detect pin
usb0_vbus_power-supply:
description: Power supply to detect the USB OTG VBUS
usb0_vbus-supply:
description: Regulator controlling USB OTG VBUS
usb1_vbus-supply:
description: Regulator controlling USB1 Host controller
usb2_vbus-supply:
description: Regulator controlling USB2 Host controller
usb3_vbus-supply:
description: Regulator controlling USB3 Host controller
required:
- "#phy-cells"
- compatible
- clocks
- clock-names
- reg
- reg-names
- resets
- reset-names
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/sun8i-h3-ccu.h>
#include <dt-bindings/reset/sun8i-h3-ccu.h>
phy@1c19400 {
#phy-cells = <1>;
compatible = "allwinner,sun8i-h3-usb-phy";
reg = <0x01c19400 0x2c>,
<0x01c1a800 0x4>,
<0x01c1b800 0x4>,
<0x01c1c800 0x4>,
<0x01c1d800 0x4>;
reg-names = "phy_ctrl",
"pmu0",
"pmu1",
"pmu2",
"pmu3";
clocks = <&ccu CLK_USB_PHY0>,
<&ccu CLK_USB_PHY1>,
<&ccu CLK_USB_PHY2>,
<&ccu CLK_USB_PHY3>;
clock-names = "usb0_phy",
"usb1_phy",
"usb2_phy",
"usb3_phy";
resets = <&ccu RST_USB_PHY0>,
<&ccu RST_USB_PHY1>,
<&ccu RST_USB_PHY2>,
<&ccu RST_USB_PHY3>;
reset-names = "usb0_reset",
"usb1_reset",
"usb2_reset",
"usb3_reset";
usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
usb0_vbus-supply = <®_usb0_vbus>;
usb1_vbus-supply = <®_usb1_vbus>;
usb2_vbus-supply = <®_usb2_vbus>;
usb3_vbus-supply = <®_usb3_vbus>;
};
|
