;;
;; Copyright (c) 2012-2018, Intel Corporation
;;
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;; modification, are permitted provided that the following conditions are met:
;;
;;     * Redistributions of source code must retain the above copyright notice,
;;       this list of conditions and the following disclaimer.
;;     * Redistributions in binary form must reproduce the above copyright
;;       notice, this list of conditions and the following disclaimer in the
;;       documentation and/or other materials provided with the distribution.
;;     * Neither the name of Intel Corporation nor the names of its contributors
;;       may be used to endorse or promote products derived from this software
;;       without specific prior written permission.
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;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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;;

; This code schedules 1 blocks at a time, with 4 lanes per block
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

%define H0 0xcbbb9d5dc1059ed8
%define H1 0x629a292a367cd507
%define H2 0x9159015a3070dd17
%define H3 0x152fecd8f70e5939
%define H4 0x67332667ffc00b31
%define H5 0x8eb44a8768581511
%define H6 0xdb0c2e0d64f98fa7
%define H7 0x47b5481dbefa4fa4
%define FUNC sha384_one_block_avx

%include "sha512_one_block_avx.asm"