diff options
Diffstat (limited to 'js/src/jit/moz.build')
-rw-r--r-- | js/src/jit/moz.build | 263 |
1 files changed, 263 insertions, 0 deletions
diff --git a/js/src/jit/moz.build b/js/src/jit/moz.build new file mode 100644 index 0000000000..1d40f03369 --- /dev/null +++ b/js/src/jit/moz.build @@ -0,0 +1,263 @@ +# -*- Mode: python; indent-tabs-mode: nil; tab-width: 40 -*- +# vim: set filetype=python: +# This Source Code Form is subject to the terms of the Mozilla Public +# License, v. 2.0. If a copy of the MPL was not distributed with this +# file, You can obtain one at http://mozilla.org/MPL/2.0/. + +FINAL_LIBRARY = "js" + +# Includes should be relative to parent path +LOCAL_INCLUDES += ["!..", ".."] + +include("../js-config.mozbuild") +include("../js-cxxflags.mozbuild") + + +lir_inputs = ["LIR.h", "shared/LIR-shared.h"] + + +UNIFIED_SOURCES += [ + "AliasAnalysis.cpp", + "AlignmentMaskAnalysis.cpp", + "BacktrackingAllocator.cpp", + "Bailouts.cpp", + "BaselineBailouts.cpp", + "BaselineCacheIRCompiler.cpp", + "BaselineCodeGen.cpp", + "BaselineDebugModeOSR.cpp", + "BaselineFrame.cpp", + "BaselineFrameInfo.cpp", + "BaselineIC.cpp", + "BaselineJIT.cpp", + "BitSet.cpp", + "BytecodeAnalysis.cpp", + "CacheIR.cpp", + "CacheIRCompiler.cpp", + "CacheIRHealth.cpp", + "CacheIRSpewer.cpp", + "CodeGenerator.cpp", + "CompileWrappers.cpp", + "Disassemble.cpp", + "EdgeCaseAnalysis.cpp", + "EffectiveAddressAnalysis.cpp", + "ExecutableAllocator.cpp", + "FoldLinearArithConstants.cpp", + "InlinableNatives.cpp", + "InstructionReordering.cpp", + "Ion.cpp", + "IonAnalysis.cpp", + "IonCacheIRCompiler.cpp", + "IonCompileTask.cpp", + "IonIC.cpp", + "IonOptimizationLevels.cpp", + "Jit.cpp", + "JitcodeMap.cpp", + "JitContext.cpp", + "JitFrames.cpp", + "JitOptions.cpp", + "JitScript.cpp", + "JitSpewer.cpp", + "JSJitFrameIter.cpp", + "JSONSpewer.cpp", + "KnownClass.cpp", + "Label.cpp", + "LICM.cpp", + "Linker.cpp", + "LIR.cpp", + "Lowering.cpp", + "MacroAssembler.cpp", + "MIR.cpp", + "MIRGraph.cpp", + "MoveResolver.cpp", + "PerfSpewer.cpp", + "ProcessExecutableMemory.cpp", + "RangeAnalysis.cpp", + "Recover.cpp", + "RegisterAllocator.cpp", + "RematerializedFrame.cpp", + "SafepointIndex.cpp", + "Safepoints.cpp", + "ScalarReplacement.cpp", + "shared/CodeGenerator-shared.cpp", + "shared/Disassembler-shared.cpp", + "shared/Lowering-shared.cpp", + "Sink.cpp", + "Snapshots.cpp", + "TrialInlining.cpp", + "TypePolicy.cpp", + "ValueNumbering.cpp", + "VMFunctions.cpp", + "WarpBuilder.cpp", + "WarpBuilderShared.cpp", + "WarpCacheIRTranspiler.cpp", + "WarpOracle.cpp", + "WarpSnapshot.cpp", + "WasmBCE.cpp", + "XrayJitInfo.cpp", +] + +if CONFIG["JS_CODEGEN_NONE"]: + lir_inputs += ["none/LIR-none.h"] + UNIFIED_SOURCES += ["none/Trampoline-none.cpp"] +elif CONFIG["JS_CODEGEN_X86"] or CONFIG["JS_CODEGEN_X64"]: + lir_inputs += ["x86-shared/LIR-x86-shared.h"] + UNIFIED_SOURCES += [ + "shared/AtomicOperations-shared-jit.cpp", + "x86-shared/Architecture-x86-shared.cpp", + "x86-shared/Assembler-x86-shared.cpp", + "x86-shared/AssemblerBuffer-x86-shared.cpp", + "x86-shared/CodeGenerator-x86-shared.cpp", + "x86-shared/Lowering-x86-shared.cpp", + "x86-shared/MacroAssembler-x86-shared-SIMD-unused.cpp", + "x86-shared/MacroAssembler-x86-shared-SIMD.cpp", + "x86-shared/MacroAssembler-x86-shared.cpp", + "x86-shared/MoveEmitter-x86-shared.cpp", + ] + if CONFIG["JS_CODEGEN_X64"]: + lir_inputs += ["x64/LIR-x64.h"] + UNIFIED_SOURCES += [ + "x64/Assembler-x64.cpp", + "x64/Bailouts-x64.cpp", + "x64/CodeGenerator-x64.cpp", + "x64/Lowering-x64.cpp", + "x64/MacroAssembler-x64.cpp", + "x64/Trampoline-x64.cpp", + ] + else: + lir_inputs += ["x86/LIR-x86.h"] + UNIFIED_SOURCES += [ + "x86/Assembler-x86.cpp", + "x86/Bailouts-x86.cpp", + "x86/CodeGenerator-x86.cpp", + "x86/Lowering-x86.cpp", + "x86/MacroAssembler-x86.cpp", + "x86/Trampoline-x86.cpp", + ] +elif CONFIG["JS_CODEGEN_ARM"]: + lir_inputs += ["arm/LIR-arm.h"] + UNIFIED_SOURCES += [ + "arm/Architecture-arm.cpp", + "arm/Assembler-arm.cpp", + "arm/Bailouts-arm.cpp", + "arm/CodeGenerator-arm.cpp", + "arm/disasm/Constants-arm.cpp", + "arm/disasm/Disasm-arm.cpp", + "arm/Lowering-arm.cpp", + "arm/MacroAssembler-arm.cpp", + "arm/MoveEmitter-arm.cpp", + "arm/Trampoline-arm.cpp", + "shared/AtomicOperations-shared-jit.cpp", + ] + if CONFIG["JS_SIMULATOR_ARM"]: + UNIFIED_SOURCES += ["arm/Simulator-arm.cpp"] + elif CONFIG["OS_ARCH"] == "Darwin": + SOURCES += [ + "arm/llvm-compiler-rt/arm/aeabi_idivmod.S", + "arm/llvm-compiler-rt/arm/aeabi_uidivmod.S", + ] +elif CONFIG["JS_CODEGEN_ARM64"]: + lir_inputs += ["arm64/LIR-arm64.h"] + UNIFIED_SOURCES += [ + "arm64/Architecture-arm64.cpp", + "arm64/Assembler-arm64.cpp", + "arm64/Bailouts-arm64.cpp", + "arm64/CodeGenerator-arm64.cpp", + "arm64/Lowering-arm64.cpp", + "arm64/MacroAssembler-arm64.cpp", + "arm64/MoveEmitter-arm64.cpp", + "arm64/Trampoline-arm64.cpp", + "arm64/vixl/Assembler-vixl.cpp", + "arm64/vixl/Cpu-Features-vixl.cpp", + "arm64/vixl/Cpu-vixl.cpp", + "arm64/vixl/Decoder-vixl.cpp", + "arm64/vixl/Instructions-vixl.cpp", + "arm64/vixl/MacroAssembler-vixl.cpp", + "arm64/vixl/MozAssembler-vixl.cpp", + "arm64/vixl/MozCpu-vixl.cpp", + "arm64/vixl/MozInstructions-vixl.cpp", + "arm64/vixl/Utils-vixl.cpp", + "shared/AtomicOperations-shared-jit.cpp", + ] + vixl_werror_sources = [ + "arm64/vixl/Disasm-vixl.cpp", + "arm64/vixl/Instrument-vixl.cpp", + ] + SOURCES += vixl_werror_sources + if CONFIG["CC_TYPE"] == "clang-cl": + for f in vixl_werror_sources: + SOURCES[f].flags += ["-Wno-c++11-narrowing"] + if CONFIG["JS_SIMULATOR_ARM64"]: + UNIFIED_SOURCES += [ + "arm64/vixl/Debugger-vixl.cpp", + "arm64/vixl/Logic-vixl.cpp", + "arm64/vixl/MozSimulator-vixl.cpp", + "arm64/vixl/Simulator-vixl.cpp", + ] +elif CONFIG["JS_CODEGEN_MIPS32"] or CONFIG["JS_CODEGEN_MIPS64"]: + lir_inputs += ["mips-shared/LIR-mips-shared.h"] + UNIFIED_SOURCES += [ + "mips-shared/Architecture-mips-shared.cpp", + "mips-shared/Assembler-mips-shared.cpp", + "mips-shared/Bailouts-mips-shared.cpp", + "mips-shared/CodeGenerator-mips-shared.cpp", + "mips-shared/Lowering-mips-shared.cpp", + "mips-shared/MacroAssembler-mips-shared.cpp", + "mips-shared/MoveEmitter-mips-shared.cpp", + ] + if CONFIG["JS_CODEGEN_MIPS32"]: + lir_inputs += ["mips32/LIR-mips32.h"] + UNIFIED_SOURCES += [ + "mips32/Architecture-mips32.cpp", + "mips32/Assembler-mips32.cpp", + "mips32/Bailouts-mips32.cpp", + "mips32/CodeGenerator-mips32.cpp", + "mips32/Lowering-mips32.cpp", + "mips32/MacroAssembler-mips32.cpp", + "mips32/MoveEmitter-mips32.cpp", + "mips32/Trampoline-mips32.cpp", + ] + if CONFIG["JS_SIMULATOR_MIPS32"]: + UNIFIED_SOURCES += ["mips32/Simulator-mips32.cpp"] + elif CONFIG["JS_CODEGEN_MIPS64"]: + lir_inputs += ["mips64/LIR-mips64.h"] + UNIFIED_SOURCES += [ + "mips64/Architecture-mips64.cpp", + "mips64/Assembler-mips64.cpp", + "mips64/Bailouts-mips64.cpp", + "mips64/CodeGenerator-mips64.cpp", + "mips64/Lowering-mips64.cpp", + "mips64/MacroAssembler-mips64.cpp", + "mips64/MoveEmitter-mips64.cpp", + "mips64/Trampoline-mips64.cpp", + ] + if CONFIG["JS_SIMULATOR_MIPS64"]: + UNIFIED_SOURCES += ["mips64/Simulator-mips64.cpp"] + + +# Generate jit/MOpcodesGenerated.h from jit/MIR.h +GeneratedFile( + "MOpcodesGenerated.h", + script="GenerateOpcodeFiles.py", + entry_point="generate_mir_header", + inputs=["MIR.h"], +) + +# Generate jit/LOpcodesGenerated.h from jit/LIR.h, jit/shared/LIR-shared.h, and +# platform-specific LIR files. +GeneratedFile( + "LOpcodesGenerated.h", + script="GenerateOpcodeFiles.py", + entry_point="generate_lir_header", + inputs=lir_inputs, +) + +# Generate jit/CacheIROpsGenerated.h from jit/CacheIROps.yaml +GeneratedFile( + "CacheIROpsGenerated.h", + script="GenerateCacheIRFiles.py", + entry_point="generate_cacheirops_header", + inputs=["CacheIROps.yaml"], +) + +if CONFIG["FUZZING_INTERFACES"] and CONFIG["LIBFUZZER"]: + include("/tools/fuzzing/libfuzzer-config.mozbuild") |