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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-27 10:05:51 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-27 10:05:51 +0000 |
commit | 5d1646d90e1f2cceb9f0828f4b28318cd0ec7744 (patch) | |
tree | a94efe259b9009378be6d90eb30d2b019d95c194 /Documentation/devicetree/bindings/arm/mrvl | |
parent | Initial commit. (diff) | |
download | linux-upstream/5.10.209.tar.xz linux-upstream/5.10.209.zip |
Adding upstream version 5.10.209.upstream/5.10.209upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/mrvl')
-rw-r--r-- | Documentation/devicetree/bindings/arm/mrvl/feroceon.txt | 16 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml | 41 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/arm/mrvl/tauros2.txt | 17 |
3 files changed, 74 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt b/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt new file mode 100644 index 000000000..0d244b999 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt @@ -0,0 +1,16 @@ +* Marvell Feroceon Cache + +Required properties: +- compatible : Should be either "marvell,feroceon-cache" or + "marvell,kirkwood-cache". + +Optional properties: +- reg : Address of the L2 cache control register. Mandatory for + "marvell,kirkwood-cache", not used by "marvell,feroceon-cache" + + +Example: + l2: l2-cache@20128 { + compatible = "marvell,kirkwood-cache"; + reg = <0x20128 0x4>; + }; diff --git a/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml b/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml new file mode 100644 index 000000000..d58116136 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mrvl/mrvl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Platforms Device Tree Bindings + +maintainers: + - Lubomir Rintel <lkundrak@v3.sk> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: PXA168 Aspenite Board + items: + - enum: + - mrvl,pxa168-aspenite + - const: mrvl,pxa168 + - description: PXA910 DKB Board + items: + - enum: + - mrvl,pxa910-dkb + - const: mrvl,pxa910 + - description: MMP2 based boards + items: + - enum: + - mrvl,mmp2-brownstone + - olpc,xo-1.75 + - const: mrvl,mmp2 + - description: MMP3 based boards + items: + - enum: + - dell,wyse-ariel + - const: marvell,mmp3 + +additionalProperties: true + +... diff --git a/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt b/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt new file mode 100644 index 000000000..31af1cbb6 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt @@ -0,0 +1,17 @@ +* Marvell Tauros2 Cache + +Required properties: +- compatible : Should be "marvell,tauros2-cache". +- marvell,tauros2-cache-features : Specify the features supported for the + tauros2 cache. + The features including + CACHE_TAUROS2_PREFETCH_ON (1 << 0) + CACHE_TAUROS2_LINEFILL_BURST8 (1 << 1) + The definition can be found at + arch/arm/include/asm/hardware/cache-tauros2.h + +Example: + L2: l2-cache { + compatible = "marvell,tauros2-cache"; + marvell,tauros2-cache-features = <0x3>; + }; |