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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-27 10:05:51 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-27 10:05:51 +0000 |
commit | 5d1646d90e1f2cceb9f0828f4b28318cd0ec7744 (patch) | |
tree | a94efe259b9009378be6d90eb30d2b019d95c194 /Documentation/devicetree/bindings/iio/frequency/adf4371.yaml | |
parent | Initial commit. (diff) | |
download | linux-5d1646d90e1f2cceb9f0828f4b28318cd0ec7744.tar.xz linux-5d1646d90e1f2cceb9f0828f4b28318cd0ec7744.zip |
Adding upstream version 5.10.209.upstream/5.10.209upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'Documentation/devicetree/bindings/iio/frequency/adf4371.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/iio/frequency/adf4371.yaml | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml new file mode 100644 index 000000000..6b3a611e1 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/frequency/adf4371.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADF4371/ADF4372 Wideband Synthesizers + +maintainers: + - Popa Stefan <stefan.popa@analog.com> + +description: | + Analog Devices ADF4371/ADF4372 SPI Wideband Synthesizers + https://www.analog.com/media/en/technical-documentation/data-sheets/adf4371.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/adf4372.pdf + +properties: + compatible: + enum: + - adi,adf4371 + - adi,adf4372 + + reg: + maxItems: 1 + + clocks: + description: + Definition of the external clock (see clock/clock-bindings.txt) + maxItems: 1 + + clock-names: + description: + Must be "clkin" + maxItems: 1 + + adi,mute-till-lock-en: + type: boolean + description: + If this property is present, then the supply current to RF8P and RF8N + output stage will shut down until the ADF4371/ADF4372 achieves lock as + measured by the digital lock detect circuitry. + + spi-max-frequency: true + +required: + - compatible + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + frequency@0 { + compatible = "adi,adf4371"; + reg = <0>; + spi-max-frequency = <1000000>; + clocks = <&adf4371_clkin>; + clock-names = "clkin"; + }; + }; +... |