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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-27 10:05:51 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-27 10:05:51 +0000 |
commit | 5d1646d90e1f2cceb9f0828f4b28318cd0ec7744 (patch) | |
tree | a94efe259b9009378be6d90eb30d2b019d95c194 /Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml | |
parent | Initial commit. (diff) | |
download | linux-upstream.tar.xz linux-upstream.zip |
Adding upstream version 5.10.209.upstream/5.10.209upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to '')
-rw-r--r-- | Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml | 141 |
1 files changed, 141 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml new file mode 100644 index 000000000..8bcea8dd7 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml @@ -0,0 +1,141 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 Low-Power Timers bindings + +description: | + The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several + functions + - PWM output (with programmable prescaler, configurable polarity) + - Trigger source for STM32 ADC/DAC (LPTIM_OUT) + - Several counter modes: + - quadrature encoder to detect angular position and direction of rotary + elements, from IN1 and IN2 input signals. + - simple counter from IN1 input signal. + +maintainers: + - Fabrice Gasnier <fabrice.gasnier@st.com> + +properties: + compatible: + const: st,stm32-lptimer + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: mux + + interrupts: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + wakeup-source: true + + pwm: + type: object + + properties: + compatible: + const: st,stm32-pwm-lp + + "#pwm-cells": + const: 3 + + required: + - "#pwm-cells" + - compatible + +patternProperties: + "^trigger@[0-9]+$": + type: object + + properties: + compatible: + const: st,stm32-lptimer-trigger + + reg: + description: Identify trigger hardware block. + items: + minimum: 0 + maximum: 2 + + required: + - compatible + - reg + + counter: + type: object + + properties: + compatible: + const: st,stm32-lptimer-counter + + required: + - compatible + + timer: + type: object + + properties: + compatible: + const: st,stm32-lptimer-timer + + required: + - compatible + +required: + - "#address-cells" + - "#size-cells" + - compatible + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/stm32mp1-clks.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + timer@40002400 { + compatible = "st,stm32-lptimer"; + reg = <0x40002400 0x400>; + clocks = <&timer_clk>; + clock-names = "mux"; + interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + + pwm { + compatible = "st,stm32-pwm-lp"; + #pwm-cells = <3>; + }; + + trigger@0 { + compatible = "st,stm32-lptimer-trigger"; + reg = <0>; + }; + + counter { + compatible = "st,stm32-lptimer-counter"; + }; + + timer { + compatible = "st,stm32-lptimer-timer"; + }; + }; + +... |