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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-27 10:05:51 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-27 10:05:51 +0000
commit5d1646d90e1f2cceb9f0828f4b28318cd0ec7744 (patch)
treea94efe259b9009378be6d90eb30d2b019d95c194 /Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml
parentInitial commit. (diff)
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Adding upstream version 5.10.209.upstream/5.10.209upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics STM32 Timers bindings
+
+description: |
+ This hardware block provides 3 types of timer along with PWM functionality:
+ - advanced-control timers consist of a 16-bit auto-reload counter driven
+ by a programmable prescaler, break input feature, PWM outputs and
+ complementary PWM outputs channels.
+ - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
+ driven by a programmable prescaler and PWM outputs.
+ - basic timers consist of a 16-bit auto-reload counter driven by a
+ programmable prescaler.
+
+maintainers:
+ - Benjamin Gaignard <benjamin.gaignard@st.com>
+ - Fabrice Gasnier <fabrice.gasnier@st.com>
+
+properties:
+ compatible:
+ const: st,stm32-timers
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: int
+
+ reset:
+ maxItems: 1
+
+ dmas:
+ minItems: 1
+ maxItems: 7
+
+ dma-names:
+ items:
+ enum: [ ch1, ch2, ch3, ch4, up, trig, com ]
+ minItems: 1
+ maxItems: 7
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ pwm:
+ type: object
+
+ properties:
+ compatible:
+ const: st,stm32-pwm
+
+ "#pwm-cells":
+ const: 3
+
+ st,breakinput:
+ description:
+ One or two <index level filter> to describe break input
+ configurations.
+ $ref: /schemas/types.yaml#/definitions/uint32-matrix
+ items:
+ items:
+ - description: |
+ "index" indicates on which break input (0 or 1) the
+ configuration should be applied.
+ enum: [0, 1]
+ - description: |
+ "level" gives the active level (0=low or 1=high) of the
+ input signal for this configuration
+ enum: [0, 1]
+ - description: |
+ "filter" gives the filtering value (up to 15) to be applied.
+ maximum: 15
+ minItems: 1
+ maxItems: 2
+
+ required:
+ - "#pwm-cells"
+ - compatible
+
+patternProperties:
+ "^timer@[0-9]+$":
+ type: object
+
+ properties:
+ compatible:
+ enum:
+ - st,stm32-timer-trigger
+ - st,stm32h7-timer-trigger
+
+ reg:
+ description: Identify trigger hardware block.
+ items:
+ minimum: 0
+ maximum: 16
+
+ required:
+ - compatible
+ - reg
+
+ counter:
+ type: object
+
+ properties:
+ compatible:
+ const: st,stm32-timer-counter
+
+ required:
+ - compatible
+
+required:
+ - "#address-cells"
+ - "#size-cells"
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/stm32mp1-clks.h>
+ timers2: timers@40000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-timers";
+ reg = <0x40000000 0x400>;
+ clocks = <&rcc TIM2_K>;
+ clock-names = "int";
+ dmas = <&dmamux1 18 0x400 0x1>,
+ <&dmamux1 19 0x400 0x1>,
+ <&dmamux1 20 0x400 0x1>,
+ <&dmamux1 21 0x400 0x1>,
+ <&dmamux1 22 0x400 0x1>;
+ dma-names = "ch1", "ch2", "ch3", "ch4", "up";
+ pwm {
+ compatible = "st,stm32-pwm";
+ #pwm-cells = <3>;
+ st,breakinput = <0 1 5>;
+ };
+ timer@0 {
+ compatible = "st,stm32-timer-trigger";
+ reg = <0>;
+ };
+ counter {
+ compatible = "st,stm32-timer-counter";
+ };
+ };
+
+...