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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-27 10:05:51 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-27 10:05:51 +0000 |
commit | 5d1646d90e1f2cceb9f0828f4b28318cd0ec7744 (patch) | |
tree | a94efe259b9009378be6d90eb30d2b019d95c194 /Documentation/fb/sa1100fb.rst | |
parent | Initial commit. (diff) | |
download | linux-430c2fc249ea5c0536abd21c23382884005c9093.tar.xz linux-430c2fc249ea5c0536abd21c23382884005c9093.zip |
Adding upstream version 5.10.209.upstream/5.10.209upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'Documentation/fb/sa1100fb.rst')
-rw-r--r-- | Documentation/fb/sa1100fb.rst | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/Documentation/fb/sa1100fb.rst b/Documentation/fb/sa1100fb.rst new file mode 100644 index 000000000..67e2650e0 --- /dev/null +++ b/Documentation/fb/sa1100fb.rst @@ -0,0 +1,40 @@ +================= +What is sa1100fb? +================= + +.. [This file is cloned from VesaFB/matroxfb] + + +This is a driver for a graphic framebuffer for the SA-1100 LCD +controller. + +Configuration +============== + +For most common passive displays, giving the option:: + + video=sa1100fb:bpp:<value>,lccr0:<value>,lccr1:<value>,lccr2:<value>,lccr3:<value> + +on the kernel command line should be enough to configure the +controller. The bits per pixel (bpp) value should be 4, 8, 12, or +16. LCCR values are display-specific and should be computed as +documented in the SA-1100 Developer's Manual, Section 11.7. Dual-panel +displays are supported as long as the SDS bit is set in LCCR0; GPIO<9:2> +are used for the lower panel. + +For active displays or displays requiring additional configuration +(controlling backlights, powering on the LCD, etc.), the command line +options may not be enough to configure the display. Adding sections to +sa1100fb_init_fbinfo(), sa1100fb_activate_var(), +sa1100fb_disable_lcd_controller(), and sa1100fb_enable_lcd_controller() +will probably be necessary. + +Accepted options:: + + bpp:<value> Configure for <value> bits per pixel + lccr0:<value> Configure LCD control register 0 (11.7.3) + lccr1:<value> Configure LCD control register 1 (11.7.4) + lccr2:<value> Configure LCD control register 2 (11.7.5) + lccr3:<value> Configure LCD control register 3 (11.7.6) + +Mark Huang <mhuang@livetoy.com> |