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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-27 10:05:51 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-27 10:05:51 +0000 |
commit | 5d1646d90e1f2cceb9f0828f4b28318cd0ec7744 (patch) | |
tree | a94efe259b9009378be6d90eb30d2b019d95c194 /arch/arm/boot/dts/rda8810pl.dtsi | |
parent | Initial commit. (diff) | |
download | linux-5d1646d90e1f2cceb9f0828f4b28318cd0ec7744.tar.xz linux-5d1646d90e1f2cceb9f0828f4b28318cd0ec7744.zip |
Adding upstream version 5.10.209.upstream/5.10.209upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'arch/arm/boot/dts/rda8810pl.dtsi')
-rw-r--r-- | arch/arm/boot/dts/rda8810pl.dtsi | 147 |
1 files changed, 147 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rda8810pl.dtsi b/arch/arm/boot/dts/rda8810pl.dtsi new file mode 100644 index 000000000..f30d6ece4 --- /dev/null +++ b/arch/arm/boot/dts/rda8810pl.dtsi @@ -0,0 +1,147 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * RDA8810PL SoC + * + * Copyright (c) 2017 Andreas Färber + * Copyright (c) 2018 Manivannan Sadhasivam + */ + +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + compatible = "rda,8810pl"; + interrupt-parent = <&intc>; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a5"; + reg = <0x0>; + }; + }; + + sram@100000 { + compatible = "mmio-sram"; + reg = <0x100000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + }; + + modem@10000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x10000000 0xfffffff>; + + gpioc@1a08000 { + compatible = "rda,8810pl-gpio"; + reg = <0x1a08000 0x1000>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <32>; + }; + }; + + apb@20800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20800000 0x100000>; + + intc: interrupt-controller@0 { + compatible = "rda,8810pl-intc"; + reg = <0x0 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + apb@20900000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20900000 0x100000>; + + timer@10000 { + compatible = "rda,8810pl-timer"; + reg = <0x10000 0x1000>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH>, + <17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hwtimer", "ostimer"; + }; + + gpioa@30000 { + compatible = "rda,8810pl-gpio"; + reg = <0x30000 0x1000>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <32>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; + }; + + gpiob@31000 { + compatible = "rda,8810pl-gpio"; + reg = <0x31000 0x1000>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <32>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; + }; + + gpiod@32000 { + compatible = "rda,8810pl-gpio"; + reg = <0x32000 0x1000>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <32>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + apb@20a00000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20a00000 0x100000>; + + uart1: serial@0 { + compatible = "rda,8810pl-uart"; + reg = <0x0 0x1000>; + interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + uart2: serial@10000 { + compatible = "rda,8810pl-uart"; + reg = <0x10000 0x1000>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + uart3: serial@90000 { + compatible = "rda,8810pl-uart"; + reg = <0x90000 0x1000>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + }; + + l2: cache-controller@21100000 { + compatible = "arm,pl310-cache"; + reg = <0x21100000 0x1000>; + cache-unified; + cache-level = <2>; + }; +}; |